component

FDS8447-TP

Public Made by Adom

by adom

TECH PUBLIC MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsfds8447-tpfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers fds8447-tp: viewers · Ray 17d ago
fds8447-tp-etched.glb Publish 0.1.0 · Ray 17d ago
fds8447-tp-etched.step fds8447-tp: factory component page (tier=lcsc) · Ray 17d ago
fds8447-tp-hero.glb fds8447-tp: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
fds8447-tp-hero.overlay.json Publish 0.1.0 · Ray 17d ago
fds8447-tp.glb Publish 0.1.0 · Ray 17d ago
fds8447-tp.kicad_mod Publish 0.1.0 · Ray 17d ago
fds8447-tp.kicad_sym Publish 0.1.0 · Ray 17d ago
fds8447-tp.lbr Publish 0.1.0 · Ray 17d ago
fds8447-tp.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

FDS8447-TP

TECH PUBLIC · MOSFETs · SOP-8

FDS8447-TP from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (pins 1-3 are source).
2 S passive Source terminal of the N-channel MOSFET (pins 1-3 are source).
3 S passive Source terminal of the N-channel MOSFET (pins 1-3 are source).
4 G input Gate terminal of the N-channel MOSFET, with VGS absolute maximum of ±20 V and threshold of 1.0 to 2.5 V.
5 D passive Drain terminal of the N-channel MOSFET (pins 5-8 are drain), with VDS of 40 V and ID of 15 A.
6 D passive Drain terminal of the N-channel MOSFET (pins 5-8 are drain), with VDS of 40 V and ID of 15 A.
7 D passive Drain terminal of the N-channel MOSFET (pins 5-8 are drain), with VDS of 40 V and ID of 15 A.
8 D passive Drain terminal of the N-channel MOSFET (pins 5-8 are drain), with VDS of 40 V and ID of 15 A.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: FDS8447-TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fds8447-tp-etched.step / fds8447-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds8447-tp.step / fds8447-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 0a75c6fe896a2baf, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF