component
FDS6982AS
Public Made by Adomby adom
TECH PUBLIC MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FDS6982AS
TECH PUBLIC · MOSFETs · SOP-8
FDS6982AS from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; VDS max 30 V, continuous drain current 10 A at TA=25°C. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; VGS max ±20 V, threshold 1 V min to 3 V max at VDS=VGS, ID=250 µA. |
| 3 | S2 | passive | Source of N-channel MOSFET 2; VDS max 30 V, continuous drain current 10 A at TA=25°C. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; VGS max ±20 V, threshold 1 V min to 3 V max at VDS=VGS, ID=250 µA. |
| 5 | D2 | passive | Drain of N-channel MOSFET 2 (pins 5 and 6 are both D2); VDS max 30 V, pulsed drain current 38 A. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2 (pins 5 and 6 are both D2); VDS max 30 V, pulsed drain current 38 A. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1 (pins 7 and 8 are both D1); VDS max 30 V, pulsed drain current 38 A. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1 (pins 7 and 8 are both D1); VDS max 30 V, pulsed drain current 38 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
FDS6982AS - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
fds6982as-etched.step/fds6982as-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fds6982as.step/fds6982as.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (5 pp, sha256
2a2a4ac2d87ca4f3, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FDS6982AS
**TECH PUBLIC** · MOSFETs · SOP-8
FDS6982AS from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; VDS max 30 V, continuous drain current 10 A at TA=25°C. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; VGS max ±20 V, threshold 1 V min to 3 V max at VDS=VGS, ID=250 µA. |
| 3 | S2 | passive | Source of N-channel MOSFET 2; VDS max 30 V, continuous drain current 10 A at TA=25°C. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; VGS max ±20 V, threshold 1 V min to 3 V max at VDS=VGS, ID=250 µA. |
| 5 | D2 | passive | Drain of N-channel MOSFET 2 (pins 5 and 6 are both D2); VDS max 30 V, pulsed drain current 38 A. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2 (pins 5 and 6 are both D2); VDS max 30 V, pulsed drain current 38 A. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1 (pins 7 and 8 are both D1); VDS max 30 V, pulsed drain current 38 A. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1 (pins 7 and 8 are both D1); VDS max 30 V, pulsed drain current 38 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `FDS6982AS`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `fds6982as-etched.step` / `fds6982as-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fds6982as.step` / `fds6982as.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589839206157103104) (5 pp, sha256 `2a2a4ac2d87ca4f3`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fds6982as-datasheet.pdf)