component

FDS6685

Public Made by Adom

by adom

UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsfds6685factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers fds6685: viewers · Ray 8d ago
fds6685-etched.glb Publish 0.1.0 · Ray 8d ago
fds6685-etched.step fds6685: factory component page (tier=lcsc) · Ray 8d ago
fds6685-hero.glb fds6685: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
fds6685-hero.overlay.json Publish 0.1.0 · Ray 8d ago
fds6685.glb Publish 0.1.0 · Ray 8d ago
fds6685.kicad_mod Publish 0.1.0 · Ray 8d ago
fds6685.kicad_sym Publish 0.1.0 · Ray 8d ago
fds6685.lbr Publish 0.1.0 · Ray 8d ago
fds6685.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

FDS6685

UMW · MOSFETs · SOP-8

FDS6685 from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the P-channel MOSFET; the datasheet rates the drain-source voltage VDSS at -30 V.
2 S passive Source terminal of the P-channel MOSFET; the datasheet rates the drain-source voltage VDSS at -30 V.
3 S passive Source terminal of the P-channel MOSFET; the datasheet rates the drain-source voltage VDSS at -30 V.
4 G input Gate terminal; the datasheet rates the gate-source voltage VGSS at ±25 V.
5 D passive Drain terminal; continuous drain current is rated at -8.8 A (TA=25°C) and pulsed at -50 A.
6 D passive Drain terminal; continuous drain current is rated at -8.8 A (TA=25°C) and pulsed at -50 A.
7 D passive Drain terminal; continuous drain current is rated at -8.8 A (TA=25°C) and pulsed at -50 A.
8 D passive Drain terminal; continuous drain current is rated at -8.8 A (TA=25°C) and pulsed at -50 A.

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V ID=-250µA, VGS=0V 3
Gate Threshold Voltage VGS(th) -1 -1.7 -3 V VDS=VGS, ID=-250µA 3
Zero Gate Voltage Drain Current IDSS -1 µA VDS=-24V, VGS=0V 3
Gate-Body Leakage, Forward IGSSF 100 nA VGS=25V, VDS=0V 3
Gate-Body Leakage, Reverse IGSSR -100 nA VGS=-25V, VDS=0V 3
Static Drain-Source On-Resistance RDS(ON) 15 20 mΩ VGS=-10V, ID=-8.8A 3
Static Drain-Source On-Resistance RDS(ON) 22 35 mΩ VGS=-4.5V, ID=-6.7A 3
On-State Drain Current ID(ON) -21 A VGS=-10V, VDS=-5V 3
Drain-Source Diode Forward Voltage VSD -0.73 -1.2 V VGS=0V, IS=-2.1A (Note 2) 3
Maximum Continuous Drain-Source Diode Forward Current IS -2.1 A 3
Drain-Source Voltage VDSS -30 V TA=25°C unless otherwise noted 1
Gate-Source Voltage VGSS -25 25 V TA=25°C unless otherwise noted 1
Drain Current, Continuous ID -8.8 A Note 1a 1
Drain Current, Pulsed ID -50 A Pulsed, Note 1a 1
Power Dissipation for Single Operation PD 2.5 W Note 1a 1
Power Dissipation for Single Operation PD 1.2 W Note 1b 1
Power Dissipation for Single Operation PD 1 W Note 1c 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 1
Thermal Resistance, Junction-to-Ambient RθJA 50 °C/W Note 1a: mounted on 0.5 in² pad of 2 oz copper 2
Thermal Resistance, Junction-to-Ambient RθJA 125 °C/W Note 1c: mounted on minimum pad 2
Thermal Resistance, Junction-to-Case RθJC 25 °C/W Note 1 2

CAD (KiCad official)

  • Symbol: FDS6685
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fds6685-etched.step / fds6685-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds6685.step / fds6685.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (9 pp, sha256 222d69dc8370db9f, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF