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FDS6681Z

onsemi · MOSFETs · SO-8

FDS6681Z from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the P-channel MOSFET; source-drain diode continuous forward current is -2.1 A (IS) per the datasheet.
2 S passive Source terminal of the P-channel MOSFET; source-drain diode continuous forward current is -2.1 A (IS) per the datasheet.
3 S passive Source terminal of the P-channel MOSFET; source-drain diode continuous forward current is -2.1 A (IS) per the datasheet.
4 G input Gate terminal; VGSS is ±25 V, and the internal gate-source diode is ESD protection only with no gate overvoltage rating implied.
5 D passive Drain terminal; VDSS is -30 V and continuous drain current is -20 A at TA = 25°C (Note 1a).
6 D passive Drain terminal; VDSS is -30 V and continuous drain current is -20 A at TA = 25°C (Note 1a).
7 D passive Drain terminal; VDSS is -30 V and continuous drain current is -20 A at TA = 25°C (Note 1a).
8 D passive Drain terminal; VDSS is -30 V and continuous drain current is -20 A at TA = 25°C (Note 1a).

Key specifications

Parameter Value
Manufacturer onsemi
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -30 V 2
Gate-Source Voltage VGSS -25 25 V 2
Drain Current – Continuous ID -20 A Note 1a 2
Drain Current – Pulsed ID -105 A 2
Power Dissipation for Single Operation PD 2.5 W Note 1a 2
Power Dissipation for Single Operation PD 1.2 W Note 1b 2
Power Dissipation for Single Operation PD 1 W Note 1c 2
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 2
Drain–Source Breakdown Voltage BVDSS -30 V VGS = 0 V, ID = –250 µA 3
Zero Gate Voltage Drain Current IDSS -1 µA VDS = –24 V, VGS = 0 V 3
Gate–Body Leakage IGSS -10 10 µA VGS = ±25 V, VDS = 0 V 3
Gate Threshold Voltage VGS(th) -1 -1.8 -3 V VDS = VGS, ID = –250 µA 3
Static Drain–Source On–Resistance RDS(on) 3.8 4.6 mΩ VGS = –10 V, ID = –20 A 3
Static Drain–Source On–Resistance RDS(on) 5.2 6.5 mΩ VGS = –4.5 V, ID = –17 A 3
Static Drain–Source On–Resistance RDS(on) 5 6.3 mΩ VGS = –10 V, ID = –20 A, TJ=125°C 3
Turn–On Delay Time td(on) 20 35 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 3
Turn–On Rise Time tr 9 18 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 3
Turn–Off Delay Time td(off) 660 1060 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 3
Turn–Off Fall Time tf 380 610 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 3
Total Gate Charge at VGS = –10V Qg(TOT) 185 260 nC VDS = –15 V, ID = –20 A 3
Total Gate Charge at VGS = –5V Qg(TOT) 105 150 nC VDS = –15 V, ID = –20 A 3
Maximum Continuous Drain–Source Diode Forward Current IS -2.1 A 4
Drain–Source Diode Forward Voltage VSD -0.7 -1.2 V VGS = 0 V, IS = –2.1 A (Note 2) 4
Thermal Resistance, Junction-to-Ambient RθJA 50 °C/W Note 1a (10 sec) 2
Thermal Resistance, Junction-to-Case RθJC 25 °C/W Note 1 2

CAD (KiCad official)

  • Symbol: FDS6681Z
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: fds6681z-etched.step / fds6681z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds6681z.step / fds6681z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 9d8e68bffcc1155a, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF