# FDS4685-HXY

**HXY MOSFET** · MOSFETs · SOP-8

FDS4685-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three source pins on the SOP-8 package. |
| 2 | S | passive | Source of the P-channel MOSFET, one of three source pins on the SOP-8 package. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three source pins on the SOP-8 package. |
| 4 | G | input | Gate of the P-channel MOSFET, with a maximum gate-source voltage of ±20 V. |
| 5 | D | passive | Drain of the P-channel MOSFET, one of four drain pins, with a drain-source voltage of -40 V. |
| 6 | D | passive | Drain of the P-channel MOSFET, one of four drain pins, with a drain-source voltage of -40 V. |
| 7 | D | passive | Drain of the P-channel MOSFET, one of four drain pins, with a drain-source voltage of -40 V. |
| 8 | D | passive | Drain of the P-channel MOSFET, one of four drain pins, with a drain-source voltage of -40 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -40 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Drain Current | ID | -13 |  |  | A | TA=25℃, VGS @ 10V | 1 |
| Pulsed Drain Current | IDM | -52 |  |  | A | Repetitive rating, pulse width limited by TJ(MAX)=150°C | 1 |
| Total Power Dissipation | PD |  |  | 3 | W | TA=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 1 |
| Maximum Thermal Resistance, Junction-ambient | Rthj-a |  |  | 41 | ℃/W | Surface mounted on 1 inch² FR-4 board, 2OZ copper (note 3) | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -40 |  |  | V | VGS = 0V, ID = -250µA | 2 |
| Gate-body Leakage current | IGSS | -100 |  | 100 | nA | VDS = 0V, VGS = ±20V | 2 |
| Zero Gate Voltage Drain Current (TJ=25℃) | IDSS |  |  | -1 | μA | VDS = -40V, VGS = 0V | 2 |
| Zero Gate Voltage Drain Current (TJ=100℃) | IDSS |  |  | -100 | μA | TJ=100℃, VDS = -40V, VGS = 0V | 2 |
| Gate-Threshold Voltage | VGS(th) | -1 | -1.5 | -2.2 | V | VDS = VGS, ID = -250µA | 2 |
| Drain-Source On-Resistance | RDS(on) |  | 14 | 19 | mΩ | VGS = -10V, ID = -10A | 2 |
| Drain-Source On-Resistance | RDS(on) |  | 19.5 | 25 | mΩ | VGS = -4.5V, ID = -5A | 2 |
| Diode Forward Voltage | VSD |  |  | -1.2 | V | IS = -10A, VGS = 0V | 2 |
| Continuous Source Current | IS |  |  | -13 | A | TC=25°C | 2 |

## CAD (KiCad official)

- Symbol: `FDS4685-HXY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `fds4685-hxy-etched.step` / `fds4685-hxy-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fds4685-hxy.step` / `fds4685-hxy.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HXY MOSFET datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758122358869495808) (7 pp, sha256 `b3cce9a2c0739b3c`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fds4685-hxy-datasheet.pdf)