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Ray Publish 0.1.0 1fa2100 17d ago

FDS4675-NL-JSM

JSMSEMI · MOSFETs · SOP-8

FDS4675-NL-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the P-channel MOSFET (pins 1, 2 and 3 are tied together as source); the datasheet rates diode continuous forward current at -3 A for the device.
2 S passive Source terminal of the P-channel MOSFET (pins 1, 2 and 3 are tied together as source); the datasheet rates diode continuous forward current at -3 A for the device.
3 S passive Source terminal of the P-channel MOSFET (pins 1, 2 and 3 are tied together as source); the datasheet rates diode continuous forward current at -3 A for the device.
4 G input Gate terminal of the P-channel MOSFET; the gate-source voltage is rated at ±25 V (VGSS).
5 D passive Drain terminal of the P-channel MOSFET (pins 5 to 8 are tied together as drain); the drain-source voltage is rated at -40 V (VDSS) and continuous drain current at -11 A at TA=25°C.
6 D passive Drain terminal of the P-channel MOSFET (pins 5 to 8 are tied together as drain); the drain-source voltage is rated at -40 V (VDSS) and continuous drain current at -11 A at TA=25°C.
7 D passive Drain terminal of the P-channel MOSFET (pins 5 to 8 are tied together as drain); the drain-source voltage is rated at -40 V (VDSS) and continuous drain current at -11 A at TA=25°C.
8 D passive Drain terminal of the P-channel MOSFET (pins 5 to 8 are tied together as drain); the drain-source voltage is rated at -40 V (VDSS) and continuous drain current at -11 A at TA=25°C.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -40 V VGS=0V, IDS=-250mA 2
Zero Gate Voltage Drain Current IDSS -1 mA VDS=-32V, VGS=0V 2
Zero Gate Voltage Drain Current IDSS 30 mA TJ=85°C 2
Gate Threshold Voltage VGS(th) -1.4 -1.9 -2.4 V VDS=VGS, IDS=-250mA 2
Gate Leakage Current IGSS -100 100 nA VGS=±25V, VDS=0V 2
Drain-Source On-state Resistance RDS(ON) 13 18 mW VGS=-10V, IDS=-11A 2
Drain-Source On-state Resistance RDS(ON) 16 22 mW VGS=-4.5V, IDS=-7A 2
Drain-Source Voltage VDSS -40 V 1
Gate-Source Voltage VGSS -25 25 V 1
Continuous Drain Current ID -11 A VGS=-10V, TA=25°C 1
Continuous Drain Current ID -9 A VGS=-10V, TA=70°C 1
300ms Pulsed Drain Current IDM -44 A VGS=-10V, 300ms pulse 1
Diode Continuous Forward Current IS -3 A 1
Avalanche Current, Single pulse IAS -33 A L=0.1mH 1
Avalanche Energy, Single pulse EAS 54 mJ L=0.1mH 1
Maximum Power Dissipation PD 3.1 W t ≤ 10s 1
Maximum Power Dissipation PD 2 W Steady State 1
Maximum Junction Temperature TJ 150 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Thermal Resistance-Junction to Ambient RθJA 40 °C/W t ≤ 10s 1
Thermal Resistance-Junction to Ambient RθJA 75 °C/W Steady State 1
Thermal Resistance-Junction to Lead RθJL 2 °C/W Steady State 1

CAD (KiCad official)

  • Symbol: FDS4675-NL-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fds4675-nl-jsm-etched.step / fds4675-nl-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds4675-nl-jsm.step / fds4675-nl-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (7 pp, sha256 623254896eca1f35, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF