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FDP12N50NZ-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, TO-220AB. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FDP12N50NZ-VB
VBsemi Elec · MOSFETs · TO-220AB
FDP12N50NZ-VB from VBsemi Elec, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is rated at ±30 V in the absolute maximum ratings. |
| 2 | D | passive | Drain terminal, also the case/tab (junction-to-case drain), with drain-source voltage rated at 650 V in the absolute maximum ratings. |
| 3 | S | passive | Source terminal; the continuous source-drain diode current IS is specified in the body diode characteristics. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-220AB |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 650 | V | 1 | |||
| Gate-Source Voltage | VGS | -30 | 30 | V | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Soldering Recommendations (Peak Temperature) | 300 | °C | for 10 s | 1 | |||
| Maximum Junction-to-Ambient | RthJA | 63 | °C/W | 2 | |||
| Maximum Junction-to-Case (Drain) | RthJC | 0.6 | °C/W | 2 | |||
| Drain-Source Breakdown Voltage | VDS | 600 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-Source Threshold Voltage (N) | VGS(th) | 2 | 4 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±20 V | 2 | |
| Gate-Source Leakage | IGSS | -1 | 1 | μA | VGS = ±30 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS = 600 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | μA | VDS = 520 V, VGS = 0 V, TJ = 125 °C | 2 | ||
| Gate Input Resistance | Rg | 3.5 | Ω | f = 1 MHz, open drain | 2 | ||
| Diode Forward Voltage | VSD | 1.5 | V | TJ = 25 °C, IS = 4 A, VGS = 0 V | 2 | ||
| VDS Temperature Coefficient | ΔVDS/TJ | -0.65 | V/°C | Reference to 25 °C, ID = 1 mA | 2 | ||
| Reverse Recovery Time | trr | 190 | ns | TJ = 25 °C, IF = IS = 4 A, dI/dt = 100 A/μs, VR = 400 V | 2 | ||
| Reverse Recovery Charge | Qrr | 2.3 | μC | TJ = 25 °C, IF = IS = 4 A, dI/dt = 100 A/μs, VR = 400 V | 2 |
CAD (KiCad official)
- Symbol:
FDP12N50NZ-VB - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220AB (KiCad packages3D, STEP)
- 3D model files:
fdp12n50nz-vb-etched.step/fdp12n50nz-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fdp12n50nz-vb.step/fdp12n50nz-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (8 pp, sha256
7435ccab7fb390ef, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FDP12N50NZ-VB
**VBsemi Elec** · MOSFETs · TO-220AB
FDP12N50NZ-VB from VBsemi Elec, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is rated at ±30 V in the absolute maximum ratings. |
| 2 | D | passive | Drain terminal, also the case/tab (junction-to-case drain), with drain-source voltage rated at 650 V in the absolute maximum ratings. |
| 3 | S | passive | Source terminal; the continuous source-drain diode current IS is specified in the body diode characteristics. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-220AB |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 650 | V | | 1 |
| Gate-Source Voltage | VGS | -30 | | 30 | V | | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Soldering Recommendations (Peak Temperature) | | | | 300 | °C | for 10 s | 1 |
| Maximum Junction-to-Ambient | RthJA | | | 63 | °C/W | | 2 |
| Maximum Junction-to-Case (Drain) | RthJC | | | 0.6 | °C/W | | 2 |
| Drain-Source Breakdown Voltage | VDS | 600 | | | V | VGS = 0 V, ID = 250 μA | 2 |
| Gate-Source Threshold Voltage (N) | VGS(th) | 2 | | 4 | V | VDS = VGS, ID = 250 μA | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VGS = ±20 V | 2 |
| Gate-Source Leakage | IGSS | -1 | | 1 | μA | VGS = ±30 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS = 600 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | μA | VDS = 520 V, VGS = 0 V, TJ = 125 °C | 2 |
| Gate Input Resistance | Rg | | 3.5 | | Ω | f = 1 MHz, open drain | 2 |
| Diode Forward Voltage | VSD | | | 1.5 | V | TJ = 25 °C, IS = 4 A, VGS = 0 V | 2 |
| VDS Temperature Coefficient | ΔVDS/TJ | | -0.65 | | V/°C | Reference to 25 °C, ID = 1 mA | 2 |
| Reverse Recovery Time | trr | | 190 | | ns | TJ = 25 °C, IF = IS = 4 A, dI/dt = 100 A/μs, VR = 400 V | 2 |
| Reverse Recovery Charge | Qrr | | 2.3 | | μC | TJ = 25 °C, IF = IS = 4 A, dI/dt = 100 A/μs, VR = 400 V | 2 |
## CAD (KiCad official)
- Symbol: `FDP12N50NZ-VB`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220AB (KiCad packages3D, STEP)
- 3D model files: `fdp12n50nz-vb-etched.step` / `fdp12n50nz-vb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fdp12n50nz-vb.step` / `fdp12n50nz-vb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VBsemi Elec datasheet](docs/fdp12n50nz-vb-datasheet.pdf) (8 pp, sha256 `7435ccab7fb390ef`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fdp12n50nz-vb-datasheet.pdf)