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FDN359AN

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UMW MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs Publish 0.1.0 · Ray 2h ago
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fdn359an-etched.step fdn359an: factory component page (tier=lcsc) · Ray 2h ago
fdn359an-hero.glb fdn359an: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
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fdn359an.lbr Publish 0.1.0 · Ray 2h ago
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FDN359AN

UMW · MOSFETs · SOT-23

FDN359AN from UMW, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE of the N-channel MOSFET; the datasheet gives VGSS = ±20 V as the maximum gate-source voltage.
2 S passive SOURCE of the N-channel MOSFET; the datasheet gives no pin-specific limit, and the device is rated VDSS = 30 V with continuous ID = 2.7 A.
3 D passive DRAIN of the N-channel MOSFET; the datasheet gives VDSS = 30 V and continuous ID = 2.7 A (Note 1a), and states that the thermal reference is the solder mounting surface of the drain pins.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 30 V 1
Gate-Source Voltage VGSS -20 20 V Printed as ±20 1
Drain Current, Continuous ID 2.7 A Note 1a 1
Drain Current, Pulsed ID 15 A 1
Power Dissipation for Single Operation PD 0.5 W Note 1a 1
Power Dissipation for Single Operation PD 0.46 W Note 1b 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 1
BVDSS Drain-source breakdown voltage BVDSS 30 V VGS=0V, ID=250µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS=24V, VGS=0V 2
Zero Gate Voltage Drain Current at TJ=55°C IDSS 10 µA VDS=24V, VGS=0V, TJ=55°C 2
Gate - Body Leakage, Forward IGSSF 100 nA VGS=20V, VDS=0V 2
Gate - Body Leakage, Reverse IGSSR -100 nA VGS=-20V, VDS=0V 2
Gate Threshold Voltage VGS(th) 1 1.6 3 V VDS=VGS, ID=250µA 2
On-State Drain Current ID(ON) 15 A VGS=10V, VDS=5V 2
Static Drain-Source On-Resistance RDS(ON) 37 46 mΩ VGS=10V, ID=2.7A 2
Static Drain-Source On-Resistance RDS(ON) 49 60 mΩ VGS=4.5V, ID=2.4A 2
Forward Transconductance gFS 9.5 S VDS=5V, ID=2.7A 2
Turn-On Delay Time tD(on) 6 12 ns VDD=5V, ID=1A, VGS=4.5V, RGEN=6Ω 2
Turn-On Rise Time tr 13 24 ns VDD=5V, ID=1A, VGS=4.5V, RGEN=6Ω 2
Turn-Off Delay Time tD(off) 15 27 ns VDD=5V, ID=1A, VGS=4.5V, RGEN=6Ω 2
Turn-Off Fall Time tf 4 10 ns VDD=5V, ID=1A, VGS=4.5V, RGEN=6Ω 2
Total Gate Charge Qg 5 7 nC VDS=10V, ID=2.7A, VGS=5V 3
Maximum Continuous Drain-Source Diode Forward Current IS 0.42 A 3
Drain-Source Diode Forward Voltage VSD 0.65 1.2 V VGS=0V, IS=0.42A (Note) 3
Thermal Resistance, Junction-to-Ambient RθJA 250 °C/W Note 1a: 0.02 in² pad of 2 oz copper 1
Thermal Resistance, Junction-to-Ambient (minimum pad) RθJA 270 °C/W Note 1b: minimum pad (from page 3 note b) 3
Thermal Resistance, Junction-to-Case RθJC 75 °C/W Note 1 1

CAD (KiCad official)

  • Symbol: FDN359AN
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: fdn359an-etched.step / fdn359an-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdn359an.step / fdn359an.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (8 pp, sha256 9d0b6a854107502f, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF