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FDN352AP

UMW · MOSFETs · SOT-23

FDN352AP from UMW, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE terminal of the P-channel MOSFET; the datasheet gives the gate-source voltage limit as VGSS = ±25 V.
2 S passive SOURCE terminal of the P-channel MOSFET; the datasheet specifies no pin-specific limit.
3 D passive DRAIN terminal of the P-channel MOSFET; the drain-source voltage limit is VDSS = -30 V.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V ID=-250µA, VGS=0V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS=-24V, VGS=0V 2
Gate-Body Leakage IGSS -100 100 nA VGS=±25V, VDS=0V 2
Static Drain-Source On-Resistance RDS(ON) 150 mΩ VGS=-10V, ID=-1.3A 2
Static Drain-Source On-Resistance RDS(ON) 250 mΩ VGS=-4.5V, ID=-1.1A 2
Drain-Source Voltage VDSS -30 V 1
Gate-Source Voltage VGSS -25 25 V 1
Drain Current, Continuous ID -1.3 A Note 1a 1
Drain Current, Pulsed ID -10 A Pulsed 1
Maximum Power Dissipation PD 0.5 W Note 1a 1
Maximum Power Dissipation PD 0.46 W Note 1b 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 1
Thermal Resistance, Junction-to-Ambient RθJA 250 °C/W Note 1a 1
Thermal Resistance, Junction-to-Case RθJC 75 °C/W Note 1 1
Thermal Resistance, Junction-to-Ambient RθJA 270 °C/W Note 1b 3
Maximum Continuous Drain-Source Diode Forward Current IS -0.42 A 3
Drain-Source Diode Forward Voltage VSD -0.8 -1.2 V VGS=0V, IS=-0.42A (Note 2) 3

CAD (KiCad official)

  • Symbol: FDN352AP
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: fdn352ap-etched.step / fdn352ap-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdn352ap.step / fdn352ap.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (8 pp, sha256 517c78c63f59ce46, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF