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FDN327N-ES

ElecSuper · MOSFETs · SOT-23

FDN327N-ES from ElecSuper, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate of the N-channel MOSFET; the datasheet gives a gate-source voltage absolute maximum of VGS ±12 V and a gate threshold voltage VGS(TH) of 0.5 V min, 0.75 V typ, 1.0 V max at ID = 250 µA.
2 Source passive Source of the N-channel MOSFET; the datasheet gives no pin-specific limit for this terminal, and the body diode forward voltage is VSD 1.5 V max at IS = 4 A with VGS = 0 V.
3 Drain passive Drain of the N-channel MOSFET; the device drain-source voltage BVDSS is 20 V and continuous drain current ID is 4 A at TA = 25 °C (device ratings, not pin-specific).

Key specifications

Parameter Value
Manufacturer ElecSuper
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage BVDSS 20 V 2
Gate-Source Voltage VGS -12 12 V 2
Continuous Drain Current ID 4 A TA=25°C 2
Continuous Drain Current ID 3 A TA=100°C 2
Maximum Power Dissipation PD 1.2 W 2
Pulsed Drain Current IDM 16 A 2
Operating Junction Temperature TJ 150 °C 2
Lead Temperature TL 260 °C 2
Storage Temperature Range Tstg -55 150 °C 2
Junction-to-Ambient Thermal Resistance RθJA 106 °C/W Single operation 2
Drain-to-Source Breakdown Voltage BVDSS 20 V VGS=0V, ID=250uA 3
Zero Gate Voltage Drain Current IDSS 1 uA VDS=20V, VGS=0V 3
Gate-to-Source Leakage Current IGSS -100 100 nA VDS=0V, VGS=±12V 3
Gate Threshold Voltage VGS(TH) 0.5 0.75 1 V VGS=VDS, ID=250uA 3
Drain-to-Source On-resistance RDS(on) 25 32 mΩ VGS=4.5V, ID=4A 3
Drain-to-Source On-resistance RDS(on) 29 38 mΩ VGS=2.5V, ID=3A 3
Forward Voltage VSD 1.5 V VGS=0V, IS=4A 3
Input Capacitance CISS 470 pF VGS=0V, f=1MHz, VDS=10V 3
Output Capacitance COSS 55 pF VGS=0V, f=1MHz, VDS=10V 3
Reverse Transfer Capacitance CRSS 50 pF VGS=0V, f=1MHz, VDS=10V 3
Total Gate Charge QG(TOT) 6 nC VGS=4.5V, VDS=10V, ID=2A 3
Gate-to-Source Charge QGS 1 nC VGS=4.5V, VDS=10V, ID=2A 3
Gate-to-Drain Charge QGD 1.5 nC VGS=4.5V, VDS=10V, ID=2A 3
Turn-On Delay Time td(ON) 4 ns VGS=4.5V, VDS=10V, ID=2A, RG=3Ω 3
Rise Time tr 13 ns VGS=4.5V, VDS=10V, ID=2A, RG=3Ω 3
Turn-Off Delay Time td(OFF) 65 ns VGS=4.5V, VDS=10V, ID=2A, RG=3Ω 3
Fall Time tf 33 ns VGS=4.5V, VDS=10V, ID=2A, RG=3Ω 3

CAD (KiCad official)

  • Symbol: FDN327N-ES
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: fdn327n-es-etched.step / fdn327n-es-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdn327n-es.step / fdn327n-es.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ElecSuper datasheet (6 pp, sha256 af50b14731d8ed74, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF