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FDMS039N08B-VB

Public Made by Adom

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VBsemi Elec MOSFETs, DFN5x6-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsfdms039n08b-vbfactory-2.0.0extractor-text

Verified FDMS039N08B-VB

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: FDMS039N08B-VB · DFN5x6-8 · 9 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 8-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: DFN-S-8-1EP_6x5mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-fforq8iq/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ fdms039n08b-vb.kicad_sym✓ fdms039n08b-vb.kicad_mod✓ fdms039n08b-vb.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers fdms039n08b-vb: viewers · Ray 1d ago
fdms039n08b-vb-etched.glb Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb-etched.step fdms039n08b-vb: factory component page (tier=lcsc) · Ray 1d ago
fdms039n08b-vb-hero.glb fdms039n08b-vb: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
fdms039n08b-vb-hero.overlay.json Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb.glb Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb.kicad_mod Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb.kicad_sym Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb.lbr Publish 0.1.0 · Ray 1d ago
fdms039n08b-vb.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier lcsc, 9 pins · Ray 1d ago

FDMS039N08B-VB

VBsemi Elec · MOSFETs · DFN5x6-8

FDMS039N08B-VB from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (pin 1, marked with a dot); drain-source voltage is rated 80 V.
2 S passive Source terminal of the N-channel MOSFET; continuous source-drain diode current is 60 A at TC = 25 °C.
3 S passive Source terminal of the N-channel MOSFET, tied to the other source pins.
4 G input Gate terminal; gate-source voltage is limited to ±20 V, with a threshold of 1.2 V min to 2.8 V max at 250 µA.
5 D passive Drain terminal of the N-channel MOSFET; drain-source voltage is rated 80 V.
6 D passive Drain terminal of the N-channel MOSFET; continuous drain current is 60 A (package limited) at TC = 25 °C.
7 D passive Drain terminal of the N-channel MOSFET; pulsed drain current is 100 A (t = 300 µs).
8 D passive Drain terminal of the N-channel MOSFET, tied to the other drain pins.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package DFN5x6-8
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 80 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 60 A TC = 25 °C (TJ = 150 °C) 1
Continuous Drain Current ID 23.8 A TA = 25 °C 1
Continuous Drain Current ID 19 A TA = 70 °C 1
Pulsed Drain Current IDM 100 A t = 300 μs 1
Continuous Source-Drain Diode Current IS 60 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS 5.6 A TA = 25 °C 1
Single Pulse Avalanche Current IAS 35 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 61 mJ 1
Maximum Power Dissipation PD 104 W TC = 25 °C 1
Maximum Power Dissipation PD 66.6 W TC = 70 °C 1
Maximum Power Dissipation PD 6.25 W TA = 25 °C 1
Maximum Power Dissipation PD 4 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Soldering Recommendations (Peak Temperature) 260 °C 1
Drain-Source Breakdown Voltage VDS 80 V VGS = 0 V, ID = 250 μA 2
Gate-Source Threshold Voltage VGS(th) 1.2 2.8 V VDS = VGS, ID = 250 μA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 μA VDS = 80 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 μA VDS = 80 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 30 A VDS ≥ 5 V, VGS = 10 V 2
Total Gate Charge Qg 57 86 nC VDS = 40 V, VGS = 10 V, ID = 20 A 2
Total Gate Charge Qg 42 63 nC VDS = 40 V, VGS = 7.5 V, ID = 20 A 2
Total Gate Charge Qg 25 38 nC VDS = 40 V, VGS = 4.5 V, ID = 20 A 2
Output Charge Qoss 70 105 nC VDS = 40 V, VGS = 0 V 2
Gate Resistance Rg 0.3 0.95 1.9 Ω f = 1 MHz 2
Rise Time tr 12 24 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 34 68 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 16 32 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 7.5 V, Rg = 1 Ω 2
Rise Time tr 15 30 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 7.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 32 64 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 7.5 V, Rg = 1 Ω 2
Fall Time tf 8 16 ns VDD = 40 V, RL = 2 Ω, ID ≅ 20 A, VGEN = 7.5 V, Rg = 1 Ω 2
Continuous Source-Drain Diode Current IS 60 A TC = 25 °C 2
Pulse Diode Forward Current ISM 100 A 2
Body Diode Voltage VSD 0.73 1.1 V IS = 5 A 2
Body Diode Reverse Recovery Time trr 53 105 ns IF = 20 A, dI/dt = 100 A/μs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 65 130 nC IF = 20 A, dI/dt = 100 A/μs, TJ = 25 °C 2
Maximum Junction-to-Ambient (t ≤ 10 s) RthJA 15 20 °C/W t ≤ 10 s, surface mounted on 1in x 1in FR4 1
Maximum Junction-to-Ambient (steady state) RthJA 54 °C/W Steady state (note f) 1
Maximum Junction-to-Case (Drain), steady state RthJC 0.9 1.2 °C/W Steady state 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper d. The DFN 5X x6 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation 1

CAD (KiCad official)

  • Symbol: FDMS039N08B-VB
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN5x6-8 (KiCad packages3D, STEP)
  • 3D model files: fdms039n08b-vb-etched.step / fdms039n08b-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdms039n08b-vb.step / fdms039n08b-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (8 pp, sha256 c6fe434170101a11, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF