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Ray Publish 0.1.0 8244024 20d ago

FDG6301N

onsemi · MOSFETs · SC-70-6

FDG6301N from onsemi, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel FET 1; pins 1 and 4 are interchangeable because the pinout is symmetrical.
2 G1 input Gate of FET 1, logic level with VGS(th) below 1.5 V, protected by a gate-source Zener (>6 kV HBM) and rated at 8 V VGSS maximum.
3 D2 passive Drain of FET 2, rated 25 V VDSS and 0.22 A continuous (0.65 A pulsed).
4 S2 passive Source of N-channel FET 2; pins 1 and 4 are interchangeable because the pinout is symmetrical.
5 G2 input Gate of FET 2, logic level with VGS(th) below 1.5 V, protected by a gate-source Zener (>6 kV HBM) and rated at 8 V VGSS maximum.
6 D1 passive Drain of FET 1, rated 25 V VDSS and 0.22 A continuous (0.65 A pulsed).

Key specifications

Parameter Value
Manufacturer onsemi
Package SC-70-6
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: FDG6301N
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SC-70-6 (KiCad packages3D, STEP)
  • 3D model files: fdg6301n-etched.step / fdg6301n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdg6301n.step / fdg6301n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 9b16e1c174228595, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF