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Ray fdg316p-vb: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) ee68a84 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "fdg316p-vb",
  "title": "FDG316P-VB",
  "brief": "VBsemi Elec MOSFETs, SC-70-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "transistors-thyristors",
    "fdg316p-vb"
  ],
  "component": {
    "mpn": "FDG316P-VB",
    "manufacturer": "VBsemi Elec",
    "package": "SC-70-6",
    "pin_count": 6,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110486540242944",
    "parts": {
      "symbol": "fdg316p-vb.kicad_sym",
      "footprint": "fdg316p-vb.kicad_mod",
      "model_3d": "fdg316p-vb-etched.glb",
      "model_3d_plain": "fdg316p-vb.glb",
      "model_3d_step": "fdg316p-vb-etched.step",
      "model_3d_step_plain": "fdg316p-vb.step",
      "lbr": "fdg316p-vb.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "D",
        "type": "passive",
        "description": "Drain. Tied internally to pins 2, 5, and 6 (multiple drain leads share package heat/current). Absolute maximum VDS = -20 V; continuous ID = -4 A (package limited)."
      },
      {
        "number": "2",
        "name": "D",
        "type": "passive",
        "description": "Drain. Common drain lead paralleled with pins 1, 5, and 6."
      },
      {
        "number": "3",
        "name": "G",
        "type": "input",
        "description": "Gate. VGS absolute maximum ±12 V; VGS(th) typ. -1 V (max -0.4 V) at VDS = VGS, ID = -250 µA. Drive to VGS ≤ -4.5 V for lowest RDS(on) ≈ 34 mΩ."
      },
      {
        "number": "4",
        "name": "S",
        "type": "passive",
        "description": "Source. Single source lead; carries channel and body-diode current. Continuous source-drain diode current IS = -2.3 A, VSD typ. -0.85 V at IS = -4 A, VGS = 0 V."
      },
      {
        "number": "5",
        "name": "D",
        "type": "passive",
        "description": "Drain. Common drain lead paralleled with pins 1, 2, and 6."
      },
      {
        "number": "6",
        "name": "D",
        "type": "passive",
        "description": "Drain. Common drain lead paralleled with pins 1, 2, and 5."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110486540242944",
        "pages": null,
        "sha256": "6be0282c2d6c382c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "fdg316p-vb.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "045cc95e18ee7a13d1623c3ce6604fc833049bdb4f952f68c26e3c5767d122e4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "fdg316p-vb-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "330a6bd613f01ab1f40c87692ff8a868e8468af98c68f31e654f23d0ff625936",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "VBsemi Elec",
      "Package": "SC-70-6",
      "Category": "Transistors/Thyristors",
      "Pins": "6"
    }
  },
  "variants": [
    {
      "mpn": "FDG316P-VB",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "fdg316p-vb"
  ],
  "discovery_pitch": "FDG316P-VB (VBsemi Elec) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "fdg316p-vb.kicad_sym",
    "fdg316p-vb.kicad_mod",
    "fdg316p-vb.glb",
    "fdg316p-vb.step",
    "fdg316p-vb.lbr",
    "docs/hero.png",
    "docs/fdg316p-vb-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T20:33:38.282Z"
}