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FDD6676AS

UMW · MOSFETs · TO-252

FDD6676AS from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE terminal of the 30V N-channel MOSFET; the datasheet gives a gate-source voltage rating of ±20V (VGSS).
2 D passive DRAIN terminal; the datasheet notes that the thermal case reference is the solder mounting surface of the drain pins, and gives a maximum drain-source voltage of 30V (VDSS).
3 S passive SOURCE terminal of the MOSFET, carrying the source side of the drain current rated at 90A continuous (ID) in the datasheet.

Key specifications

Parameter Value
Manufacturer UMW
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 30 V 1
Gate-Source Voltage VGSS -20 20 V 1
Drain Current - Continuous ID 90 A Note 3 1
Drain Current - Pulsed 100 A Note 1a 1
Power Dissipation for Single Operation PD 70 W Note 1 1
Power Dissipation for Single Operation PD 3.1 W Note 1a 1
Power Dissipation for Single Operation PD 1.3 W Note 1b 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 1
Drain-Source Breakdown Voltage BVDSS 30 V VGS=0V, ID=1mA 3
Gate-Body Leakage IGSS -100 100 nA VGS=±20V, VDS=0V 3
Gate Threshold Voltage VGS(th) 1.5 3 V VDS=VGS, ID=1mA 3
Static Drain-Source On-Resistance RDS(ON) 4.7 5.7 mΩ VGS=10V, ID=16A 3
Static Drain-Source On-Resistance RDS(ON) 5.8 7.1 mΩ VGS=4.5V, ID=15A 3
Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTJ 31 mV/°C ID=10mA, Referenced to 25°C 3
Gate Threshold Voltage Temperature Coefficient ΔVGS(th)/ΔTJ -3.6 mV/°C ID=10mA, Referenced to 25°C 3
Drain-Source Avalanche Energy WDSS 250 mJ Single Pulse, VDD=15V, ID=16A 3
Drain-Source Avalanche Current IAR 16 A 3
Forward Transconductance gFS 21 S VDS=5V, ID=16A 3
Input Capacitance Ciss 2500 pF VDS=15V, VGS=0V, f=1MHz 3
Output Capacitance Coss 710 pF VDS=15V, VGS=0V, f=1MHz 3
Reverse Transfer Capacitance Crss 270 pF VDS=15V, VGS=0V, f=1MHz 3
Gate Resistance Rg 1.6 Ω VGS=0V, f=1MHz 3
Turn-On Delay Time tD(on) 12 ns VDD=15V, ID=1A, VGS=10V, RGEN=6Ω 3
Turn-On Rise Time tr 12 ns VDD=15V, ID=1A, VGS=10V, RGEN=6Ω 3
Turn-Off Delay Time tD(off) 46 ns VDD=15V, ID=1A, VGS=10V, RGEN=6Ω 3
Turn-Off Fall Time tf 28 ns VDD=15V, ID=1A, VGS=10V, RGEN=6Ω 3
Turn-On Delay Time tD(on) 20 ns VDD=15V, ID=1A, VGS=4.5V, RGEN=6Ω 3
Turn-On Rise Time tr 24 ns VDD=15V, ID=1A, VGS=4.5V, RGEN=6Ω 3
Turn-Off Delay Time tD(off) 35 ns VDD=15V, ID=1A, VGS=4.5V, RGEN=6Ω 3
Turn-Off Fall Time tf 27 ns VDD=15V, ID=1A, VGS=4.5V, RGEN=6Ω 3
Total Gate Charge, VGS=10V Qg(TOT) 46 nC VDS=15V, ID=16A 4
Maximum Continuous Drain-Source Diode Forward Current IS 3.5 A 4
Thermal Resistance, Junction-to-Case RθJC 1.8 °C/W Note 1 2
Thermal Resistance, Junction-to-Ambient RθJA 40 °C/W Note 1a (1 in² pad of 2oz copper) 2
Thermal Resistance, Junction-to-Ambient RθJA 96 °C/W Note 1b (minimum pad) 2

CAD (KiCad official)

  • Symbol: FDD6676AS
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: fdd6676as-etched.step / fdd6676as-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdd6676as.step / fdd6676as.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (9 pp, sha256 df2f7d73a4bfc4f2, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF