component
FDD4243
Public Made by Adomby adom
UMW MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FDD4243
UMW · MOSFETs · TO-252
FDD4243 from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE of the -40V P-Channel MOSFET; the datasheet rates gate-to-source voltage VGS at ±20 V. |
| 2 | D | passive | DRAIN of the MOSFET; rated drain-to-source voltage VDS = -40 V and continuous drain current -14 A (package limited) at TC = 25°C. |
| 3 | S | passive | SOURCE of the MOSFET; the reference terminal for the VGS and VDS ratings given in the absolute maximum table. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain to Source Voltage | VDS | -40 | V | 1 | |||
| Gate to Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Drain Current -Continuous (Package limited) | ID | -14 | A | TC=25°C | 1 | ||
| Drain Current -Continuous (Silicon limited) | ID | -24 | A | TC=25°C (Note 1) | 1 | ||
| Drain Current -Continuous | ID | -6.7 | A | TA=25°C (Note 1a) | 1 | ||
| Drain Current -Pulsed | ID | -60 | A | 1 | |||
| Single Pulse Avalanche Energy | EAS | 84 | mJ | Note 3: TJ=25°C, L=3mH, IAS=7.5A, VDD=40V, VGS=10V | 1 | ||
| Power Dissipation | PD | 42 | W | TC=25°C | 1 | ||
| Power Dissipation | PD | 3 | W | TA=25°C (Note 1a) | 1 | ||
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | ID=-250µA, VGS=0V | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS=-32V, VGS=0V | 3 | ||
| Zero Gate Voltage Drain Current at TJ=125°C | IDSS | -100 | µA | VDS=-32V, VGS=0V, TJ=125°C | 3 | ||
| Gate to Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 3 | |
| Gate to Source Threshold Voltage | VGS(th) | -1.6 | -3 | V | VDS=VGS, ID=-250µA | 3 | |
| Drain to Source On Resistance | RDS(ON) | 13 | 20 | mΩ | VGS=-10V, ID=-6.7A | 3 | |
| Drain to Source On Resistance | RDS(ON) | 16 | 30 | mΩ | VGS=-4.5V, ID=-5.5A | 3 | |
| Input Capacitance | Ciss | 1165 | 1550 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 | |
| Output Capacitance | Coss | 165 | 220 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 | |
| Reverse Transfer Capacitance | Crss | 90 | 135 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 | |
| Source to Drain Diode Forward Voltage | VSD | 0.86 | 1.2 | V | VGS=0V, IS=-6.7A (Note 2) | 4 | |
| Reverse Recovery Time | trr | 29 | 43 | ns | IF=-6.7A, di/dt=100A/µs | 4 | |
| Reverse Recovery Charge | Qrr | 30 | 44 | nC | IF=-6.7A, di/dt=100A/µs | 4 | |
| Thermal Resistance, Junction to Case | RθJC | 3 | °C/W | 2 | |||
| Thermal Resistance, Junction to Ambient | RθJA | 40 | °C/W | Note 1a: 1 in² pad of 2 oz copper | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJC is determined by the user’s board design. a. 40°C/W when mounted on a 1 in 2 pad of 2 oz copper | 4 |
CAD (KiCad official)
- Symbol:
FDD4243 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
fdd4243-etched.step/fdd4243-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fdd4243.step/fdd4243.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (10 pp, sha256
cea10567a07fd55f, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FDD4243
**UMW** · MOSFETs · TO-252
FDD4243 from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE of the -40V P-Channel MOSFET; the datasheet rates gate-to-source voltage VGS at ±20 V. |
| 2 | D | passive | DRAIN of the MOSFET; rated drain-to-source voltage VDS = -40 V and continuous drain current -14 A (package limited) at TC = 25°C. |
| 3 | S | passive | SOURCE of the MOSFET; the reference terminal for the VGS and VDS ratings given in the absolute maximum table. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain to Source Voltage | VDS | | | -40 | V | | 1 |
| Gate to Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Drain Current -Continuous (Package limited) | ID | | | -14 | A | TC=25°C | 1 |
| Drain Current -Continuous (Silicon limited) | ID | | | -24 | A | TC=25°C (Note 1) | 1 |
| Drain Current -Continuous | ID | | | -6.7 | A | TA=25°C (Note 1a) | 1 |
| Drain Current -Pulsed | ID | | | -60 | A | | 1 |
| Single Pulse Avalanche Energy | EAS | | | 84 | mJ | Note 3: TJ=25°C, L=3mH, IAS=7.5A, VDD=40V, VGS=10V | 1 |
| Power Dissipation | PD | | | 42 | W | TC=25°C | 1 |
| Power Dissipation | PD | | | 3 | W | TA=25°C (Note 1a) | 1 |
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Drain-Source Breakdown Voltage | BVDSS | -40 | | | V | ID=-250µA, VGS=0V | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS=-32V, VGS=0V | 3 |
| Zero Gate Voltage Drain Current at TJ=125°C | IDSS | | | -100 | µA | VDS=-32V, VGS=0V, TJ=125°C | 3 |
| Gate to Source Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 3 |
| Gate to Source Threshold Voltage | VGS(th) | | -1.6 | -3 | V | VDS=VGS, ID=-250µA | 3 |
| Drain to Source On Resistance | RDS(ON) | | 13 | 20 | mΩ | VGS=-10V, ID=-6.7A | 3 |
| Drain to Source On Resistance | RDS(ON) | | 16 | 30 | mΩ | VGS=-4.5V, ID=-5.5A | 3 |
| Input Capacitance | Ciss | | 1165 | 1550 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 |
| Output Capacitance | Coss | | 165 | 220 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 |
| Reverse Transfer Capacitance | Crss | | 90 | 135 | pF | VDS=-20V, VGS=0V, f=1MHz | 3 |
| Source to Drain Diode Forward Voltage | VSD | | 0.86 | 1.2 | V | VGS=0V, IS=-6.7A (Note 2) | 4 |
| Reverse Recovery Time | trr | | 29 | 43 | ns | IF=-6.7A, di/dt=100A/µs | 4 |
| Reverse Recovery Charge | Qrr | | 30 | 44 | nC | IF=-6.7A, di/dt=100A/µs | 4 |
| Thermal Resistance, Junction to Case | RθJC | | 3 | | °C/W | | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | 40 | | °C/W | Note 1a: 1 in² pad of 2 oz copper | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJC is determined by the user’s board design. a. 40°C/W when mounted on a 1 in 2 pad of 2 oz copper | 4 |
## CAD (KiCad official)
- Symbol: `FDD4243`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `fdd4243-etched.step` / `fdd4243-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fdd4243.step` / `fdd4243.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755877444618870784) (10 pp, sha256 `cea10567a07fd55f`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fdd4243-datasheet.pdf)