component
FDD4141-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFDD4141-VB
VBsemi Elec · MOSFETs · TO-252
FDD4141-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET; VGS is limited to ±20 V with threshold VGS(th) of -1.0 to -3.5 V at ID = -250 µA. |
| 2 | D | passive | Drain of the P-channel MOSFET (centre lead, also the case/tab); VDS is -40 V max and continuous ID is -50 A at TC = 25 °C. |
| 3 | S | passive | Source of the P-channel MOSFET; continuous diode source current IS is -50 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDS | -40 | V | VGS = 0 V, ID = -250 μA | 2 | ||
| Gate-Source Threshold Voltage | VGS(th) | -1 | -3.5 | V | VDS = VGS, ID = -250 μA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VGS = 0 V, VDS = -40 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -50 | μA | VGS = 0 V, VDS = -40 V, TJ = 125 °C | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -150 | μA | VGS = 0 V, VDS = -40 V, TJ = 175 °C | 2 | ||
| On-State Drain Current | ID(on) | -50 | A | VGS = -10 V, VDS ≤ -5 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.017 | Ω | VGS = -10 V, ID = -10 A, TJ = 125 °C | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.02 | Ω | VGS = -10 V, ID = -10 A, TJ = 175 °C | 2 | ||
| Output Capacitance | Coss | 635 | pF | VGS = 0 V, VDS = -25 V, f = 1 MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 440 | pF | VGS = 0 V, VDS = -25 V, f = 1 MHz | 2 | ||
| Total Gate Charge | Qg | 80 | nC | VGS = -10 V, VDS = -30 V, ID = -50 A | 2 | ||
| Gate-Source Charge | Qgs | 8.6 | nC | 2 | |||
| Gate-Drain Charge | Qgd | 22 | nC | 2 | |||
| Gate Resistance | Rg | 1.5 | 3 | 4.5 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | 15 | ns | VDD = -20 V, RL = 0.4, ID ≈ -50 A, VGEN = -10 V, Rg = 1 | 2 | ||
| Rise Time | tr | 18 | ns | VDD = -20 V, RL = 0.4, ID ≈ -50 A, VGEN = -10 V, Rg = 1 | 2 | ||
| Turn-Off Delay Time | td(off) | 60 | ns | VDD = -20 V, RL = 0.4, ID ≈ -50 A, VGEN = -10 V, Rg = 1 | 2 | ||
| Fall Time | tf | 24 | ns | VDD = -20 V, RL = 0.4, ID ≈ -50 A, VGEN = -10 V, Rg = 1 | 2 | ||
| Pulsed Current (source-drain diode) | ISM | -200 | A | 2 | |||
| Forward Voltage | VSD | -1 | -1.5 | V | IF = -50 A, VGS = 0 V | 2 | |
| Drain-Source Voltage | VDS | -40 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -50 | A | TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | -39 | A | TC = 125 °C | 1 | ||
| Continuous Source Current (Diode Conduction) | IS | -50 | A | 1 | |||
| Pulsed Drain Current | IDM | -200 | A | 1 | |||
| Single Pulse Avalanche Current | IAS | -40 | A | L = 0.1 mH | 1 | ||
| Single Pulse Avalanche Energy | EAS | 80 | mJ | 1 | |||
| Maximum Power Dissipation | PD | 3 | W | TA = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 136 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 45 | W | TC = 125 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 175 | °C | 1 | ||
| Junction-to-Ambient (PCB Mount) | RthJA | 50 | °C/W | PCB Mount | 1 | ||
| Junction-to-Case (Drain) | RthJC | 1.1 | °C/W | 1 |
CAD (KiCad official)
- Symbol:
FDD4141-VB - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
fdd4141-vb-etched.step/fdd4141-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fdd4141-vb.step/fdd4141-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (9 pp, sha256
31da265d03817241, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).