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FDC855N-VB

Public Made by Adom

by adom

VBsemi Elec MOSFETs, TSOP-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs fdc855n-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers fdc855n-vb: viewers · Ray 1mo ago
fdc855n-vb-etched.fit.json fdc855n-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
fdc855n-vb-etched.glb fdc855n-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
fdc855n-vb-etched.step fdc855n-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
fdc855n-vb.glb Publish 0.1.0 · Ray 1mo ago
fdc855n-vb.kicad_mod Publish 0.1.0 · Ray 1mo ago
fdc855n-vb.kicad_sym Publish 0.1.0 · Ray 1mo ago
fdc855n-vb.lbr Publish 0.1.0 · Ray 1mo ago
fdc855n-vb.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json fdc855n-vb: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md fdc855n-vb: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

FDC855N-VB

VBsemi Elec · MOSFETs · TSOP-6

FDC855N-VB from VBsemi Elec, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal of the N-channel MOSFET. Tied internally to pins 2, 5, and 6 for improved current handling and thermal dissipation. Rated VDS = 30 V, ID = 6 A (TC = 25 °C).
2 D passive Drain terminal of the N-channel MOSFET (paralleled with pins 1, 5, 6). Rated VDS = 30 V.
3 G input Gate terminal. VGS absolute maximum ± 20 V; typical gate-source threshold VGS(th) = 0.5 V to 1.5 V at ID = 250 µA. Gate resistance Rg typ. 2.5 Ω.
4 S passive Source terminal of the N-channel MOSFET. Body diode anode; forward voltage VSD typ. 0.82 V at IS = 4.4 A.
5 D passive Drain terminal of the N-channel MOSFET (paralleled with pins 1, 2, 6). Rated VDS = 30 V.
6 D passive Drain terminal of the N-channel MOSFET (paralleled with pins 1, 2, 5). Rated VDS = 30 V.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • FDC855N-VB

CAD (KiCad official)

  • Symbol: FDC855N-VB
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: fdc855n-vb-etched.step / fdc855n-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdc855n-vb.step / fdc855n-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (None pp, sha256 f268b877e4ca1ccf, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF