component
FDC6330L
Public Made by Adomby adom
onsemi AC-DC Controllers and Regulators, TSOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C112086). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
fdc6330l.lbr+20−2@@ -60,6 +60,18 @@ <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/> <smd name="5" x="1.1375" y="-0.0000" dx="1.3250" dy="0.6000" layer="1"/> <smd name="6" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.4500" y="1.5100"/>+ <vertex x="-1.6900" y="1.8400"/>+ <vertex x="-1.2100" y="1.8400"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.4000" y="1.4500"/>+ <vertex x="0.8000" y="1.4500"/>+ <vertex x="0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="1.0500"/>+ </polygon> <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/> <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="FDC6330L">@@ -102,7 +114,13 @@ <connect gate="G$1" pin="G1" pad="5"/> <connect gate="G$1" pin="D1" pad="6"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="FDC6330L" constant="no"/>+ <attribute name="MANUFACTURER" value="onsemi" constant="no"/>+ <attribute name="LCSC_PN" value="C112086" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+6−4@@ -26,19 +26,21 @@ "model_3d_step": "fdc6330l.step", "lbr": "fdc6330l.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C112086"+ }, "pins": [ { "number": "1", "name": "R2", "type": "passive",- "description": "Source of internal N-channel control MOSFET Q1. Connected externally to ground through pull-down resistor R2 (typ. 1k-4.7 kΩ) which sets the slew rate of Q2's gate turn-on."+ "description": "Source of internal N-channel control MOSFET Q1. Connected externally to ground through pull-down resistor R2 (typ. 1k-4.7 k\u03a9) which sets the slew rate of Q2's gate turn-on." }, { "number": "2", "name": "VOUT/C1", "type": "power_out",- "description": "Drain of internal P-channel power MOSFET Q2; switched output to the load. Tied to pin 3 (both are Q2 drain leads for current handling). Output bypass capacitor C1 (≤1 µF) connects here."+ "description": "Drain of internal P-channel power MOSFET Q2; switched output to the load. Tied to pin 3 (both are Q2 drain leads for current handling). Output bypass capacitor C1 (\u22641 \u00b5F) connects here." }, { "number": "3",@@ -62,7 +64,7 @@ "number": "6", "name": "R1/C1_GATE", "type": "passive",- "description": "Drain of control MOSFET Q1 and gate of power MOSFET Q2. External R1 connects this pin back to VIN (pin 4) to pull Q2's gate off; R1/R2 ratio is chosen in the range 10-100. Optional in-rush snub capacitor C1 (≤1000 pF) may be added here for slew-rate control."+ "description": "Drain of control MOSFET Q1 and gate of power MOSFET Q2. External R1 connects this pin back to VIN (pin 4) to pull Q2's gate off; R1/R2 ratio is chosen in the range 10-100. Optional in-rush snub capacitor C1 (\u22641000 pF) may be added here for slew-rate control." } ], "provenance": {