# FDC6330L-TP

**TECH PUBLIC** · Power Distribution Switches · SOT-23-6

FDC6330L-TP from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R2 | passive | Connects through optional slew-rate control resistor R2 (typical 0kΩ to 100kΩ) to ground; R1 should be at least 10 × R2 to ensure Q1 turn-on. |
| 2 | Vout,C1 | power_out | Switched output (Q2 drain) tied to pin 3 and the load, with optional slew-rate capacitor C1 (typical 1uF) connected to pin 6. |
| 3 | Vout,C1 | power_out | Switched output (Q2 drain) tied to pin 2 and the load, with optional slew-rate capacitor C1 (typical 1uF) connected to pin 6. |
| 4 | Vin,R1 | power_in | Input voltage supply, rated 3-20 V, with pull-up resistor R1 (typical 10kΩ to 1MΩ) connected between this pin and pin 6. |
| 5 | ON/OFF | input | On/off control input to Q1 gate, with a 1.5-8 V on/off voltage range and 2 kV HBM ESD rating. |
| 6 | R1,C1 | passive | Gate node of Q2 where pull-up resistor R1 (typical 10kΩ to 1MΩ) from Vin and slew-rate capacitor C1 (typical 1uF) to Vout connect. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |

## CAD (KiCad official)

- Symbol: `FDC6330L-TP`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `fdc6330l-tp-etched.step` / `fdc6330l-tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fdc6330l-tp.step` / `fdc6330l-tp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589837373695045632) (6 pp, sha256 `b896c8a6939999ff`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fdc6330l-tp-datasheet.pdf)