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Contents

README

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FDC5661N-VB

VBsemi Elec · MOSFETs · TSOP-6

FDC5661N-VB from VBsemi Elec, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain, internally connected to the other drain pins (2, 5, 6); VDS rated 60 V.
2 D passive Drain, internally connected to the other drain pins (1, 5, 6); continuous drain current 7 A at TC = 25 °C.
3 G input Gate, with gate-source voltage limited to ±20 V and threshold of 1.0 to 2.5 V.
4 S passive Source, with continuous source (diode) current of 6 A.
5 D passive Drain, internally connected to the other drain pins (1, 2, 6); pulsed drain current 29 A.
6 D passive Drain, internally connected to the other drain pins (1, 2, 5); RDS(on) 0.030 ohm at VGS = 10 V.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 60 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 7 A TC = 25 °C 1
Continuous Drain Current ID 4 A TC = 125 °C 1
Continuous Source Current (Diode Conduction) IS 6 A 1
Pulsed Drain Current IDM 29 A 1
Single Pulse Avalanche Current IAS 10 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 5 mJ 1
Maximum Power Dissipation PD 5 W TC = 25 °C 1
Maximum Power Dissipation PD 1.6 W TC = 125 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Junction-to-Ambient (PCB Mount) RthJA 110 °C/W PCB mount, 1" square FR-4 PCB 1
Junction-to-Foot (Drain) RthJF 30 °C/W 1
Drain-Source Breakdown Voltage VDS 60 V VGS = 0, ID = 250 μA 2
Gate-Source Threshold Voltage VGS(th) 1 2.5 V VDS = VGS, ID = 250 μA 2
Gate-Source Leakage IGSS -500 500 nA VDS = 0 V, VGS = ± 12 V 2
Gate-Source Leakage IGSS -1 1 mA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 μA VGS = 0 V, VDS = 60 V 2
Zero Gate Voltage Drain Current IDSS 50 μA VGS = 0 V, VDS = 60 V, TJ = 125 °C 2
Zero Gate Voltage Drain Current IDSS 150 μA VGS = 0 V, VDS = 60 V, TJ = 175 °C 2
On-State Drain Current ID(on) 10 A VGS = 10 V, VDS ≥ 5 V 2
Input Capacitance Ciss 560 700 pF VGS = 0 V, VDS = 30 V, f = 1 MHz 2
Output Capacitance Coss 85 105 pF VGS = 0 V, VDS = 30 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 55 70 pF VGS = 0 V, VDS = 30 V, f = 1 MHz 2
Gate Resistance Rg 1.2 2.4 3.6 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 9 14 ns VDD = 30 V, RL = 7.5 Ω, ID 4 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 12 18 ns VDD = 30 V, RL = 7.5 Ω, ID 4 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 19 29 ns VDD = 30 V, RL = 7.5 Ω, ID 4 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 7 11 ns VDD = 30 V, RL = 7.5 Ω, ID 4 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed Current ISM 29 A 2
Forward Voltage VSD 0.75 1.2 V IF = 1.6 A, VGS = 0 2

CAD (KiCad official)

  • Symbol: FDC5661N-VB
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: fdc5661n-vb-etched.step / fdc5661n-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdc5661n-vb.step / fdc5661n-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (7 pp, sha256 26a9f1c91bce2461, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF