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FD6288T

Fortior Tech · Gate Drive ICs · TSSOP-20

FD6288T from Fortior Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN1 input High-side logic input for channel 1, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
2 HIN2 input High-side logic input for channel 2, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
3 HIN3 input High-side logic input for channel 3, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
4 LIN1 input Low-side logic input for channel 1, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
5 LIN2 input Low-side logic input for channel 2, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
6 LIN3 input Low-side logic input for channel 3, compatible with 3.3 V/5 V logic (VIH minimum 2.7 V, VIL maximum 0.8 V) and internally pulled down through about 200 kΩ.
7 VCC power_in Low-side supply voltage, recommended 5.0 V to 20 V, with absolute maximum range -0.3 V to 25 V and UVLO protection.
8 COM power_in Ground reference for the device; all voltages in the datasheet are referenced to COM.
9 LO3 output Low-side gate driver output for channel 3, in phase with LIN3 and swinging between 0 V and VCC.
10 LO2 output Low-side gate driver output for channel 2, in phase with LIN2 and swinging between 0 V and VCC.
11 LO1 output Low-side gate driver output for channel 1, in phase with LIN1 and swinging between 0 V and VCC.
12 VS3 passive High-side floating offset voltage for channel 3, rated from VB3-25 V to VB3+0.3 V with dVS/dt up to 50 V/ns, and operating from COM-4 V to 250 V.
13 HO3 output High-side gate driver output for channel 3, referenced to VS3 and limited to VS3-0.3 V to VB3+0.3 V.
14 VB3 power_in High-side floating supply for channel 3, rated -0.3 V to 275 V absolute and operated at VS3+5 V to VS3+20 V.
15 VS2 passive High-side floating offset voltage for channel 2, rated from VB2-25 V to VB2+0.3 V with dVS/dt up to 50 V/ns, and operating from COM-4 V to 250 V.
16 HO2 output High-side gate driver output for channel 2, referenced to VS2 and limited to VS2-0.3 V to VB2+0.3 V.
17 VB2 power_in High-side floating supply for channel 2, rated -0.3 V to 275 V absolute and operated at VS2+5 V to VS2+20 V.
18 VS1 passive High-side floating offset voltage for channel 1, rated from VB1-25 V to VB1+0.3 V with dVS/dt up to 50 V/ns, and operating from COM-4 V to 250 V.
19 HO1 output High-side gate driver output for channel 1, referenced to VS1 and limited to VS1-0.3 V to VB1+0.3 V.
20 VB1 power_in High-side floating supply for channel 1, rated -0.3 V to 275 V absolute and operated at VS1+5 V to VS1+20 V.

Key specifications

Parameter Value
Manufacturer Fortior Tech
Package TSSOP-20
Category Power Management ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-side floating absolute voltage (absolute max) VB1,2,3 -0.3 275 V 10
Low-side supply voltage (absolute max) VCC -0.3 25 V 10
Low-side output voltage (absolute max) VLO1,2,3 -0.3 V max printed as VCC+0.3 V 10
Logic input voltage HIN, LIN (absolute max) VIN -0.3 V max printed as VCC+0.3 V 10
Offset voltage slew rate (absolute max) dVS/dt 50 V/ns 10
Power dissipation TSSOP20 PD 1.25 W TA≤25C 10
Junction-to-ambient thermal resistance TSSOP20 RthJA 100 C/W 10
Junction temperature range Tj 150 C 10
Storage temperature range Tstg -55 150 C 10
High-side floating offset voltage (recommended) VS1,2,3 -4 250 V min printed as COM-4 (referenced to COM); HO operates normally for COM-4 V to 250 V (note 3) 10
Low-side supply voltage (recommended) VCC 5 20 V 10
Low-side output voltage (recommended) VLO1,2,3 0 V max printed as VCC 10
Logic input voltage HIN, LIN (recommended) VIN 0 V max printed as VCC 10
Ambient temperature (recommended) TA -40 125 C 10
High-level input threshold voltage VIH 2.7 V 11
Low-level input threshold voltage VIL 0.8 V 11
VCC undervoltage protection trip voltage VCCUV+ 4.2 4.6 5 V 11
VCC undervoltage protection reset voltage VCCUV- 3.9 4.3 4.7 V 11
VCC undervoltage protection hysteresis voltage VCCUVH 0.2 0.3 V 11
VBS undervoltage protection trip voltage VBSUV+ 4.2 4.6 5 V 11
VBS undervoltage protection reset voltage VBSUV- 3.9 4.3 4.7 V 11
VBS undervoltage protection hysteresis voltage VBSUVH 0.2 0.3 V 11
Floating supply leakage current ILK 0.1 5 μA VB1,2,3=VS1,2,3=250V 11
VBS quiescent current IQBS 180 270 μA VIN=0V or 5V 11
VBS dynamic current IPBS 180 270 μA fHIN1,2,3=20kHz 11
VCC quiescent current IQCC 330 500 μA VIN=0V or 5V 11
VCC dynamic current IPCC 330 500 μA fLIN1,2,3=20kHz 11
LIN high-level input bias current ILIN+ 25 40 μA VLIN=5V 11
LIN low-level input bias current ILIN- 1 μA VLIN=0V 11
HIN high-level input bias current IHIN+ 25 40 μA VHIN=5V 11
HIN low-level input bias current IHIN- 1 μA VHIN=0V 11
Input pull-down resistance RIN 140 200 260 KΩ 11
High-level output voltage VOH 0.6 0.9 V IO=100mA 11
Low-level output voltage VOL 0.3 0.45 V IO=100mA 11
High-level output short-circuit pulsed current IOH 1.1 1.5 1.9 A VO=0V, VIN=5V, PWD≤10μs 11
Low-level output short-circuit pulsed current IOL 1.3 1.8 2.3 A VO=15V, VIN=0V, PWD≤10μs 11
Output rising-edge propagation delay ton 300 450 ns 12
Output falling-edge propagation delay toff 100 160 ns 12
Output rise time tr 12 25 ns CL=1000pF 12
Output fall time tf 12 25 ns CL=1000pF 12
High-low side delay matching MT 30 ns 12
Dead time DT 100 200 300 ns 12

CAD (KiCad official)

  • Symbol: FD6288T
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: fd6288t-etched.step / fd6288t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fd6288t.step / fd6288t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Fortior Tech datasheet (23 pp, sha256 04971e5e1aea3a18, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF