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FD6287T

Public Made by Adom

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Fortior Tech(峰岹) Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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FD6287T

Fortior Tech(峰岹) · Gate Drivers · TSSOP-20

FD6287T from Fortior Tech(峰岹), in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN1 input High-side logic input for channel 1, in phase with HO1, with VIH min 2.7 V, VIL max 0.8 V and an internal pull-down (RIN 200-320 kΩ).
2 HIN2 input High-side logic input for channel 2, in phase with HO2, with VIH min 2.7 V, VIL max 0.8 V and an internal pull-down (RIN 200-320 kΩ).
3 HIN3 input High-side logic input for channel 3, in phase with HO3, with VIH min 2.7 V, VIL max 0.8 V and an internal pull-down (RIN 200-320 kΩ).
4 LIN1* input Low-side logic input for channel 1, inverted to LO1, sharing the same VIH/VIL thresholds and internal pull-down as HIN1.
5 LIN2* input Low-side logic input for channel 2, inverted to LO2, sharing the same VIH/VIL thresholds and internal pull-down as HIN2.
6 LIN3* input Low-side logic input for channel 3, inverted to LO3, sharing the same VIH/VIL thresholds and internal pull-down as HIN3.
7 VCC power_in Low-side supply voltage, recommended 7 V to 20 V absolute maximum −0.3 V to 25 V, with UVLO trip 5.8-7.0 V; place the 10-100 µF filter capacitor close to the pin.
8 COM power_in Ground reference; all voltages in the datasheet, including inputs and low-side outputs, are referenced to COM.
9 LO3 output Low-side gate driver output for channel 3, inverted from LIN3, with pulsed source/sink current of +1.5 A / −1.8 A (typ).
10 LO2 output Low-side gate driver output for channel 2, inverted from LIN2, with pulsed source/sink current of +1.5 A / −1.8 A (typ).
11 LO1 output Low-side gate driver output for channel 1, inverted from LIN1, with pulsed source/sink current of +1.5 A / −1.8 A (typ).
12 VS3 passive High-side floating offset (return) for channel 3; static range COM−2 V to 250 V, dynamic −50 V for 50 ns transients.
13 HO3 output High-side gate driver output for channel 3, in phase with HIN3, referenced to VS3.
14 VB3 power_in High-side floating supply for channel 3, 7 V to 20 V above VS3 with UVLO trip 5.8-7.0 V; absolute maximum 275 V.
15 VS2 passive High-side floating offset (return) for channel 2; static range COM−2 V to 250 V, dynamic −50 V for 50 ns transients.
16 HO2 output High-side gate driver output for channel 2, in phase with HIN2, referenced to VS2.
17 VB2 power_in High-side floating supply for channel 2, 7 V to 20 V above VS2 with UVLO trip 5.8-7.0 V; absolute maximum 275 V.
18 VS1 passive High-side floating offset (return) for channel 1; static range COM−2 V to 250 V, dynamic −50 V for 50 ns transients.
19 HO1 output High-side gate driver output for channel 1, in phase with HIN1, referenced to VS1.
20 VB1 power_in High-side floating supply for channel 1, 7 V to 20 V above VS1 with UVLO trip 5.8-7.0 V; absolute maximum 275 V.

Key specifications

Parameter Value
Manufacturer Fortior Tech(峰岹)
Package TSSOP-20
Category Motor Driver ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-side floating absolute voltage VB1,2,3 -0.3 275 V 2
Low-side supply voltage VCC -0.3 25 V 2
Allowable offset voltage slew rate dVS/dt 50 V/ns 2
Power dissipation PD 1.25 W TA<=25C, TSSOP-20 2
Junction-to-ambient thermal resistance RthJA 100 C/W TSSOP-20 2
Junction temperature range Tj 150 C 2
Storage temperature range Tstg -55 150 C 2
Static high-side floating offset voltage VS1,2,3 250 V Note 1: HO operates normally for VS from COM-2V to 250V 2
Dynamic high-side floating offset voltage VS1,2,3 -50 250 V Note 2: HO operates normally for VS=COM-50V transient negative voltage, 50ns wide 2
Low-side supply voltage (recommended) VCC 7 20 V 2
Low-side output voltage (recommended) VLO1,2,3 0 V 2
Logic input voltage (HIN, LIN*) (recommended) VIN 0 V 2
Ambient temperature TA -40 125 C 2
High-level input threshold voltage VIH 2.7 V 3
Low-level input threshold voltage VIL 0.8 V 3
VCC undervoltage protection trip voltage VCCUV+ 5.8 6.4 7 V 3
VCC undervoltage protection reset voltage VCCUV- 5.4 6 6.6 V 3
VCC undervoltage protection hysteresis voltage VCCUVH 0.3 0.4 V 3
VBS undervoltage protection trip voltage VBSUV+ 5.8 6.4 7 V 3
VBS undervoltage protection reset voltage VBSUV- 5.4 6 6.6 V 3
VBS undervoltage protection hysteresis voltage VBSUVH 0.3 0.4 V 3
Floating supply leakage current ILK 0.1 5 μA VB1,2,3=VS1,2,3=250V 3
VBS quiescent current IQBS 180 270 μA VIN=0V or 5V 3
VBS dynamic current IPBS 180 270 μA fHIN1,2,3=20kHz 3
VCC quiescent current IQCC 330 500 uA VIN=0V or 5V 3
VCC dynamic current IPCC 330 500 uA fLIN1,2,3=20kHz 3
LIN* high-level input bias current ILIN+ 20 40 μA VLIN=0V 3
LIN* low-level input bias current ILIN- 2 μA VLIN=5V 3
HIN high-level input bias current IHIN+ 20 40 μA VHIN=5V 3
HIN low-level input bias current IHIN- 2 μA VHIN=0V 3
Input pull-down resistance RIN 200 260 320 KΩ 3
High-level output voltage VOH 0.6 0.9 V IO=100mA 3
Low-level output voltage VOL 0.3 0.45 V IO=100mA 3
High-level output short-circuit pulsed current IOH 1.1 1.5 1.9 A VO=0V, VIN=5V, PWD<=10μs 3
Low-level output short-circuit pulsed current IOL 1.3 1.8 2.3 A VO=15V, VIN=0V, PWD<=10μs 3
Output rising-edge propagation delay ton 300 450 ns 3
Output falling-edge propagation delay toff 100 160 ns 3
High/low side propagation delay matching MT 50 ns 3
Dead time DT 100 200 300 ns 3
VS static negative voltage VSN -6 V 3
Output rise time tr 12 ns CL=1000pF 3
Output fall time tf 12 ns CL=1000pF 3

CAD (KiCad official)

  • Symbol: FD6287T
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: fd6287t-etched.step / fd6287t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fd6287t.step / fd6287t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Fortior Tech(峰岹) datasheet (10 pp, sha256 e58825b47521d8ae, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF