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FAN73901MX
Public Made by Adomby adom
onsemi Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFAN73901MX
onsemi · Gate Drivers · SOIC-8
FAN73901MX from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN | input | Logic input for the high-side gate driver output, with logic "1" requiring at least 2.5 V and logic "0" at most 1.2 V and inputs rated from COM to VDD. |
| 2 | LIN | input | Logic input for the low-side gate driver output, with logic "1" requiring at least 2.5 V and logic "0" at most 1.2 V and inputs rated from COM to VDD. |
| 3 | COM | power_in | Low-side driver return and reference for the logic inputs and the LO output, with VLO and VIN specified relative to COM. |
| 4 | LO | output | Low-side driver output, specified from COM to VDD, capable of typically 2.5 A sourcing and sinking. |
| 5 | VDD | power_in | Low-side and logic supply, recommended at 10 V to 20 V, with the under-voltage lockout positive-going threshold typically 8.8 V. |
| 6 | VS | power_in | High-voltage floating supply return, with VS offset up to 600 V and slew rate limited to 50 V/ns maximum. |
| 7 | HO | output | High-side driver output, referenced to VS and specified between VS and VB. |
| 8 | VB | power_in | High-side floating supply, recommended at VS + 10 V to VS + 20 V, with the high-side driver operating up to VB = 625 V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VB High-Side Floating Supply Voltage | VB | -0.3 | 625 | V | 5 | ||
| VDD Low-Side and Logic Fixed Supply Voltage | VDD | -0.3 | 25 | V | 5 | ||
| Allowable Offset Voltage Slew Rate | dVS/dt | 50 | V/ns | 5 | |||
| Power Dissipation | PD | 0.625 | W | 5 | |||
| Thermal Resistance, Junction-to-Ambient | θJA | 200 | °C/W | 5 | |||
| Junction Temperature | TJ | 150 | °C | 5 | |||
| Storage Temperature | TSTG | 150 | °C | 5 | |||
| High-Side Floating Supply Offset Voltage | VS | 600 | V | 5 | |||
| Low-Side and Logic Supply Voltage | VDD | 10 | 20 | V | 5 | ||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 5 | ||
| VDD and VBS Supply Under-Voltage Positive-Going Threshold | VDDUV+, VBSUV+ | 8 | 8.8 | 9.8 | V | 6 | |
| VDD and VBS Supply Under-Voltage Negative-Going Threshold | VDDUV-, VBSUV- | 7.4 | 8.3 | 9 | V | 6 | |
| VDD and VBS Supply Under-Voltage Lockout Hysteresis Voltage | VDDUVH, VBSUVH | 0.5 | V | 6 | |||
| Offset Supply Leakage Current | ILK | 50 | µA | VB=VS=600 V | 6 | ||
| Quiescent VBS Supply Current | IQBS | 45 | 80 | µA | VIN=0V or 5 V | 6 | |
| Quiescent VDD Supply Current | IQDD | 75 | 110 | µA | VIN=0V or 5 V | 6 | |
| Operating VBS Supply Current | IPBS | 530 | 640 | µA | fIN=20 kHz, rms value | 6 | |
| Operating VDD Supply Current | IPDD | 530 | 640 | µA | fIN=20 kHz, rms value | 6 | |
| Logic "1" Input Voltage | VIH | 2.5 | V | 6 | |||
| Logic "0" Input Voltage | VIL | 1.2 | V | 6 | |||
| Logic "1" Input Bias Current | IIN+ | 25 | 50 | µA | VIN=5 V | 6 | |
| Logic "0" Input Bias Current | IIN- | 1 | 2 | µA | VIN=0 V | 6 | |
| Input Pull-Down Resistance | RIN | 100 | 200 | K | 6 | ||
| High-Level Output Voltage, VBIAS-VO | VOH | 1 | V | No Load | 6 | ||
| Low-Level Output Voltage, VO | VOL | 35 | mV | No Load | 6 | ||
| Output High, Short-Circuit Pulsed Current | IO+ | 1.8 | 2.5 | A | VO=0 V, VIN=5 V with PW<10 µs | 6 | |
| Output Low, Short-Circuit Pulsed Current | IO- | 1.8 | 2.5 | A | VO=15 V, VIN=0 V with PW<10 µs | 6 | |
| Allowable Negative VS Pin Voltage for HIN Signal Propagation to HO | VS | -9.8 | -7 | V | 6 | ||
| Turn-on Propagation Delay | ton | 140 | 200 | ns | VS=0 V | 6 | |
| Turn-off Propagation Delay | toff | 140 | 200 | ns | VS=0 V | 6 | |
| Delay Matching, HS & LS Turn-on/off | MT | 0 | 50 | ns | 6 | ||
| Turn-on Rise Time | tr | 25 | 50 | ns | 6 | ||
| Turn-off Fall Time | tf | 20 | 45 | ns | 6 |
CAD (KiCad official)
- Symbol:
FAN73901MX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fan73901mx-etched.step/fan73901mx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fan73901mx.step/fan73901mx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
95b3d3768610ed16, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).