component
FAN6300AMY
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FAN6300AMY
onsemi · AC-DC Controllers And Regulators · SOIC-8
FAN6300AMY from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DET | input | Auxiliary-winding sense input through a resistor divider for zero-current detection, valley-voltage switching and output OVP (2.5 V reference), with the DET pin clamped to 0.3 V when VAUX is negative. |
| 2 | FB | input | Voltage-loop feedback input with a 5 kΩ equivalent input impedance, which performs open-loop protection when FB exceeds about 4.2 V for more than 55 ms. |
| 3 | CS | input | Over-current comparator input that senses the switching current through a sense resistor for cycle-by-cycle current limiting, clamped to about 5.0 V when the pin is floating. |
| 4 | GND | power_in | Power and signal ground; a 0.1 µF decoupling capacitor between VDD and GND is recommended. |
| 5 | GATE | output | Totem-pole output that drives the external power MOSFET, with the gate output clamped to 18 V. |
| 6 | VDD | power_in | Power supply with turn-on and turn-off thresholds of 16 V and 10 V, a startup current below 20 µA and an operating current below 4.5 mA. |
| 7 | NC | unconnected | No connect. |
| 8 | HV | power_in | High-voltage startup pin, rated to 500 V absolute maximum with a minimum startup voltage of 50 V, typically fed from the line through an external diode and resistor (1N4007 and 100 kΩ recommended). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Ambient Temperature | TA | -40 | 125 | °C | 6 | ||
| DC Supply Voltage | VDD | 30 | V | 6 | |||
| HV pin voltage | VHV | 500 | V | 6 | |||
| GATE voltage | VH | -0.3 | 25 | V | 6 | ||
| VFB, VCS, VDET voltage | VL | -0.3 | 7 | V | 6 | ||
| Power Dissipation | PD | 400 | mW | 6 | |||
| Operating Junction Temperature | TJ | 150 | °C | 6 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 6 | ||
| Lead Temperature (Soldering) | TL | 270 | °C | Soldering 10 seconds | 6 | ||
| Continuously Operating Voltage | VOP | 25 | V | 7 | |||
| Turn-On Threshold Voltage | VDD-ON | 15 | 16 | 17 | V | 7 | |
| PWM Off Threshold Voltage | VDD-PWM-OFF | 9 | 10 | 11 | V | 7 | |
| Turn-Off Threshold Voltage | VDD-OFF | 7 | 8 | 9 | V | 7 | |
| Startup Current | IDD-ST | 10 | 20 | µA | VDD=VDD-ON -0.16 V, GATE Open | 7 | |
| Operating Current | IDD-OP | 4.5 | 5.5 | mA | VDD=15 V, fS=60 KHz, CL=2 nF | 7 | |
| Green-Mode Operating Supply Current (Average) | IDD-GREEN | 3.5 | mA | VDD=15 V, fS=2 KHz, CL=2 nF | 7 | ||
| Operating Current at PWM-Off Phase | IDD-PWM-OFF | 70 | 80 | 90 | µA | VDD=VDD-PWM-OFF-0.5 V | 7 |
| VDD Over-Voltage Protection (Latch-Off) | VDD-OVP | 26 | 27 | 28 | V | 7 | |
| VDD OVP Debounce Time | tVDD-OVP | 100 | 150 | 200 | µs | 7 | |
| VDD OVP Latch-Up Holding Current | IDD-LATCH | 42 | µA | VDD=5 V | 7 | ||
| Minimum Startup Voltage on Pin HV | VHV-MIN | 50 | V | 7 | |||
| Supply Current Drawn from Pin HV | IHV | 1.5 | 4 | mA | VAC=90 V(VDC=120V), VDD=0 V | 7 | |
| Leakage Current After Startup | IHV-LC | 1 | 20 | µA | HV=500 V, VDD=VDD-OFF +1 V | 7 | |
| Input Impedance | ZFB | 3 | 5 | 7 | KΩ | 7 | |
| Bias Current | IOZ | 1.2 | 2 | mA | FB=VOZ | 7 | |
| Zero Duty-Cycle Input Voltage | VOZ | 0.8 | 1 | 1.2 | V | 7 | |
| Open Loop Protection Threshold Voltage | VFB-OLP | 3.9 | 4.2 | 4.5 | V | 7 | |
| Debounce Time for Open-Loop/Overload Protection | tD-OLP | 46 | 52 | 62 | ms | 7 | |
| Comparator Reference Voltage | VDET-OVP | 2.45 | 2.5 | 2.55 | V | 8 | |
| Open-Loop Gain | Av | 60 | dB | 8 | |||
| Output High Voltage | VV-HIGH | 4.5 | V | 8 | |||
| Output Low Voltage | VV-LOW | 0.5 | V | 8 | |||
| Output OVP (Latched) Debounce Time | tDET-OVP | 100 | 150 | 200 | µs | 8 | |
| Maximum Source Current | IDET-SOURCE | 1 | mA | VDET=0 V | 8 | ||
| Upper Clamp Voltage | VDET-HIGH | 5 | V | IDET=-1 mA | 8 | ||
| Lower Clamp Voltage | VDET-LOW | 0.1 | 0.3 | V | IDET=1 mA | 8 | |
| Delay Time from Valley-Signal Detected to Output Turn-On | tVALLEY-DELAY | 200 | ns | 8 | |||
| Maximum On-Time | tON-MAX | 38 | 45 | 54 | µs | 8 | |
| Minimum Off-Time (FAN6300A) | tOFF-MIN | 8 | µs | VFB≧VN | 8 | ||
| Beginning of Green-On Mode at FB Voltage Level | VN | 1.95 | 2.1 | 2.25 | V | 8 | |
| Beginning of Green-Off Mode at FB Voltage Level | VG | 1 | 1.2 | 1.4 | V | 8 | |
| Green-Off Mode VFB Hysteresis Voltage | ∆VFBG | 0.05 | 0.1 | 0.2 | V | 8 | |
| Start Timer (Time-Out Timer) | tSTARTER | 1.8 | 2.1 | 2.4 | ms | VFB<VG | 8 |
| Start Timer (Time-Out Timer) | tSTARTER | 25 | 30 | 45 | µs | VFB>VFB-OLP | 8 |
| Output Voltage Low | VOL | 1.5 | V | VDD=15 V, IO=150 mA | 8 | ||
| Output Voltage High | VOH | 7.5 | V | VDD=12 V, IO=150 mA | 8 | ||
| Rising Time | tR | 145 | 200 | ns | 8 | ||
| Falling Time | tF | 55 | 120 | ns | 8 | ||
| Gate Output Clamping Voltage | VCLAMP | 16.7 | 18 | 19.3 | V | 8 | |
| Delay to Output | tPD | 20 | 150 | 200 | ns | 9 | |
| Limit Voltage on CS Pin for Over-Power Compensation | VLIMIT | 0.82 | 0.85 | 0.88 | V | IDET < 74.41 µA | 9 |
| Limit Voltage on CS Pin for Over-Power Compensation | VLIMIT | 0.38 | 0.415 | 0.45 | V | IDET=550 µA | 9 |
| Leading-Edge-Blanking Time (MOS Turns ON) | tBNK | 525 | 625 | 725 | ns | 9 | |
| VCS Clamped High Voltage once CS Pin Floating | VCS-H | 4.5 | 5 | V | CS Pin Floating | 9 | |
| Leading-Edge-Blanking Time for DET when PWM MOS Turns Off (FAN6300A) | tOFF-BNK | 4 | µs | 8 | |||
| Time-Out after tOFF-MIN (FAN6300A) | tTIME-OUT | 9 | µs | 8 | |||
| Minimum Off-Time (FAN6300A) | tOFF-MIN | 38 | µs | VFB=VG | 8 | ||
| Slope Compensation | VSLOPE | 0.3 | V | tON=45 µs | 9 | ||
| Slope Compensation | VSLOPE | 0.1 | V | tON=0 µs | 9 | ||
| Internal Threshold Temperature for OTP | TOTP | 140 | °C | 9 |
CAD (KiCad official)
- Symbol:
FAN6300AMY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fan6300amy-etched.step/fan6300amy-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fan6300amy.step/fan6300amy.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (15 pp, sha256
23d46c29c34492be, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FAN6300AMY
**onsemi** · AC-DC Controllers And Regulators · SOIC-8
FAN6300AMY from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DET | input | Auxiliary-winding sense input through a resistor divider for zero-current detection, valley-voltage switching and output OVP (2.5 V reference), with the DET pin clamped to 0.3 V when VAUX is negative. |
| 2 | FB | input | Voltage-loop feedback input with a 5 kΩ equivalent input impedance, which performs open-loop protection when FB exceeds about 4.2 V for more than 55 ms. |
| 3 | CS | input | Over-current comparator input that senses the switching current through a sense resistor for cycle-by-cycle current limiting, clamped to about 5.0 V when the pin is floating. |
| 4 | GND | power_in | Power and signal ground; a 0.1 µF decoupling capacitor between VDD and GND is recommended. |
| 5 | GATE | output | Totem-pole output that drives the external power MOSFET, with the gate output clamped to 18 V. |
| 6 | VDD | power_in | Power supply with turn-on and turn-off thresholds of 16 V and 10 V, a startup current below 20 µA and an operating current below 4.5 mA. |
| 7 | NC | unconnected | No connect. |
| 8 | HV | power_in | High-voltage startup pin, rated to 500 V absolute maximum with a minimum startup voltage of 50 V, typically fed from the line through an external diode and resistor (1N4007 and 100 kΩ recommended). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Ambient Temperature | TA | -40 | | 125 | °C | | 6 |
| DC Supply Voltage | VDD | | | 30 | V | | 6 |
| HV pin voltage | VHV | | | 500 | V | | 6 |
| GATE voltage | VH | -0.3 | | 25 | V | | 6 |
| VFB, VCS, VDET voltage | VL | -0.3 | | 7 | V | | 6 |
| Power Dissipation | PD | | | 400 | mW | | 6 |
| Operating Junction Temperature | TJ | | | 150 | °C | | 6 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 6 |
| Lead Temperature (Soldering) | TL | | | 270 | °C | Soldering 10 seconds | 6 |
| Continuously Operating Voltage | VOP | | | 25 | V | | 7 |
| Turn-On Threshold Voltage | VDD-ON | 15 | 16 | 17 | V | | 7 |
| PWM Off Threshold Voltage | VDD-PWM-OFF | 9 | 10 | 11 | V | | 7 |
| Turn-Off Threshold Voltage | VDD-OFF | 7 | 8 | 9 | V | | 7 |
| Startup Current | IDD-ST | | 10 | 20 | µA | VDD=VDD-ON -0.16 V, GATE Open | 7 |
| Operating Current | IDD-OP | | 4.5 | 5.5 | mA | VDD=15 V, fS=60 KHz, CL=2 nF | 7 |
| Green-Mode Operating Supply Current (Average) | IDD-GREEN | | | 3.5 | mA | VDD=15 V, fS=2 KHz, CL=2 nF | 7 |
| Operating Current at PWM-Off Phase | IDD-PWM-OFF | 70 | 80 | 90 | µA | VDD=VDD-PWM-OFF-0.5 V | 7 |
| VDD Over-Voltage Protection (Latch-Off) | VDD-OVP | 26 | 27 | 28 | V | | 7 |
| VDD OVP Debounce Time | tVDD-OVP | 100 | 150 | 200 | µs | | 7 |
| VDD OVP Latch-Up Holding Current | IDD-LATCH | 42 | | | µA | VDD=5 V | 7 |
| Minimum Startup Voltage on Pin HV | VHV-MIN | 50 | | | V | | 7 |
| Supply Current Drawn from Pin HV | IHV | | 1.5 | 4 | mA | VAC=90 V(VDC=120V), VDD=0 V | 7 |
| Leakage Current After Startup | IHV-LC | | 1 | 20 | µA | HV=500 V, VDD=VDD-OFF +1 V | 7 |
| Input Impedance | ZFB | 3 | 5 | 7 | KΩ | | 7 |
| Bias Current | IOZ | | 1.2 | 2 | mA | FB=VOZ | 7 |
| Zero Duty-Cycle Input Voltage | VOZ | 0.8 | 1 | 1.2 | V | | 7 |
| Open Loop Protection Threshold Voltage | VFB-OLP | 3.9 | 4.2 | 4.5 | V | | 7 |
| Debounce Time for Open-Loop/Overload Protection | tD-OLP | 46 | 52 | 62 | ms | | 7 |
| Comparator Reference Voltage | VDET-OVP | 2.45 | 2.5 | 2.55 | V | | 8 |
| Open-Loop Gain | Av | 60 | | | dB | | 8 |
| Output High Voltage | VV-HIGH | 4.5 | | | V | | 8 |
| Output Low Voltage | VV-LOW | | | 0.5 | V | | 8 |
| Output OVP (Latched) Debounce Time | tDET-OVP | 100 | 150 | 200 | µs | | 8 |
| Maximum Source Current | IDET-SOURCE | | | 1 | mA | VDET=0 V | 8 |
| Upper Clamp Voltage | VDET-HIGH | | | 5 | V | IDET=-1 mA | 8 |
| Lower Clamp Voltage | VDET-LOW | | 0.1 | 0.3 | V | IDET=1 mA | 8 |
| Delay Time from Valley-Signal Detected to Output Turn-On | tVALLEY-DELAY | | | 200 | ns | | 8 |
| Maximum On-Time | tON-MAX | 38 | 45 | 54 | µs | | 8 |
| Minimum Off-Time (FAN6300A) | tOFF-MIN | 8 | | | µs | VFB≧VN | 8 |
| Beginning of Green-On Mode at FB Voltage Level | VN | 1.95 | 2.1 | 2.25 | V | | 8 |
| Beginning of Green-Off Mode at FB Voltage Level | VG | 1 | 1.2 | 1.4 | V | | 8 |
| Green-Off Mode VFB Hysteresis Voltage | ∆VFBG | 0.05 | 0.1 | 0.2 | V | | 8 |
| Start Timer (Time-Out Timer) | tSTARTER | 1.8 | 2.1 | 2.4 | ms | VFB<VG | 8 |
| Start Timer (Time-Out Timer) | tSTARTER | 25 | 30 | 45 | µs | VFB>VFB-OLP | 8 |
| Output Voltage Low | VOL | | | 1.5 | V | VDD=15 V, IO=150 mA | 8 |
| Output Voltage High | VOH | 7.5 | | | V | VDD=12 V, IO=150 mA | 8 |
| Rising Time | tR | | 145 | 200 | ns | | 8 |
| Falling Time | tF | | 55 | 120 | ns | | 8 |
| Gate Output Clamping Voltage | VCLAMP | 16.7 | 18 | 19.3 | V | | 8 |
| Delay to Output | tPD | 20 | 150 | 200 | ns | | 9 |
| Limit Voltage on CS Pin for Over-Power Compensation | VLIMIT | 0.82 | 0.85 | 0.88 | V | IDET < 74.41 µA | 9 |
| Limit Voltage on CS Pin for Over-Power Compensation | VLIMIT | 0.38 | 0.415 | 0.45 | V | IDET=550 µA | 9 |
| Leading-Edge-Blanking Time (MOS Turns ON) | tBNK | 525 | 625 | 725 | ns | | 9 |
| VCS Clamped High Voltage once CS Pin Floating | VCS-H | | 4.5 | 5 | V | CS Pin Floating | 9 |
| Leading-Edge-Blanking Time for DET when PWM MOS Turns Off (FAN6300A) | tOFF-BNK | | 4 | | µs | | 8 |
| Time-Out after tOFF-MIN (FAN6300A) | tTIME-OUT | | 9 | | µs | | 8 |
| Minimum Off-Time (FAN6300A) | tOFF-MIN | | 38 | | µs | VFB=VG | 8 |
| Slope Compensation | VSLOPE | | 0.3 | | V | tON=45 µs | 9 |
| Slope Compensation | VSLOPE | | 0.1 | | V | tON=0 µs | 9 |
| Internal Threshold Temperature for OTP | TOTP | | 140 | | °C | | 9 |
## CAD (KiCad official)
- Symbol: `FAN6300AMY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `fan6300amy-etched.step` / `fan6300amy-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fan6300amy.step` / `fan6300amy.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879881899401216) (15 pp, sha256 `23d46c29c34492be`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fan6300amy-datasheet.pdf)