component
FAN3229TMX
Public Made by Adomby adom
onsemi Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FAN3229TMX
onsemi · Gate Drive ICs · SOIC-8
FAN3229TMX from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INA+ | input | Non-inverting input to Channel A; connect to VDD to enable the output. |
| 2 | INA− | input | Inverting input to Channel A; connect to GND to enable the output. |
| 3 | GND | power_in | Ground; common ground reference for input and output circuits. |
| 4 | INB+ | input | Non-inverting input to Channel B; connect to VDD to enable the output. |
| 5 | OUTB | output | Gate drive output B; held LOW unless the required input(s) are present and VDD is above the UVLO threshold. |
| 6 | VDD | power_in | Supply voltage that provides power to the IC; recommended operating range is 4.5 V to 18.0 V. |
| 7 | OUTA | output | Gate drive output A; held LOW unless the required input(s) are present and VDD is above the UVLO threshold. |
| 8 | INB+ | input | Inverting input to Channel B; connect to GND to enable the output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Operating Range | VDD | 4.5 | 18 | V | 6 | ||
| VDD Supply Voltage Range | VDD | 4.5 | 18 | V | 6 | ||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 6 | ||
| Enable Voltage ENA and ENB | VEN | 0 | V | 6 | |||
| Input Voltage INA, INA+, INA−, INB, INB+ and INB− | VIN | 0 | V | 6 | |||
| VDD to GND | VDD | -0.3 | 20 | V | 6 | ||
| Lead Soldering Temperature | TL | 260 | °C | 10 seconds | 6 | ||
| Junction Temperature | TJ | -55 | 150 | °C | 6 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 6 | ||
| Supply Current, Inputs/EN Not Connected (TTL) | IDD | 0.75 | 1.2 | mA | Inputs/EN Not Connected, TTL | 6 | |
| Turn-On Voltage | VON | 3.5 | 3.9 | 4.3 | V | INA = ENA = VDD, INB = ENB = 0 V | 6 |
| Turn-Off Voltage | VOFF | 3.3 | 3.7 | 4.1 | V | INA = ENA = VDD, INB = ENB = 0 V | 6 |
| INx Logic Low Threshold (TTL) | VINL_T | 0.8 | 1.2 | V | 6 | ||
| INx Logic High Threshold (TTL) | VINH_T | 1.6 | 2 | V | 6 | ||
| TTL Logic Hysteresis Voltage | VHYS_T | 0.2 | 0.4 | 0.8 | V | 6 | |
| Non-Inverting Input Current (FAN322xT) | IIN+ | -1 | 175 | A | IN from 0 to VDD | 6 | |
| Inverting Input Current (FAN322xT) | IIN− | -175 | 1 | A | IN from 0 to VDD | 6 | |
| Output Rise Time | tRISE | 12 | 22 | ns | CLOAD = 1000 pF | 7 | |
| Output Fall Time | tFALL | 9 | 17 | ns | CLOAD = 1000 pF | 7 | |
| Output Propagation Delay, TTL Inputs (tD1) | tD1 | 10 | 19 | 34 | ns | TTL Input | 7 |
| Output Propagation Delay, TTL Inputs (tD2) | tD2 | 10 | 18 | 32 | ns | TTL Input | 7 |
| Propagation Matching Between Channels | tDEL.MATCH | 1 | 2 | ns | INA = INB, OUTA and OUTB at 50% Point | 7 | |
| Junction-to-Ambient Thermal Resistance (SOIC-8) | θJA | 89 | °C/W | Natural convection, 2S2P JEDEC board (Note 4) | 2 | ||
| Junction-to-Lead Thermal Resistance (SOIC-8) | θJL | 40 | °C/W | Note 2 | 2 | ||
| Junction-to-Top Thermal Resistance (SOIC-8) | θJT | 31 | °C/W | Note 3 | 2 | ||
| Junction-to-Board Thermal Characterization (SOIC-8) | ψJB | 43 | °C/W | Note 5 | 2 | ||
| Junction-to-Top Characterization (SOIC-8) | ψJT | 3 | °C/W | Note 6 | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | is defined as the PCB copper adjacent to pin 6. | 2 |
CAD (KiCad official)
- Symbol:
FAN3229TMX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fan3229tmx-etched.step/fan3229tmx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fan3229tmx.step/fan3229tmx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (24 pp, sha256
f55d278161a01be4, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FAN3229TMX
**onsemi** · Gate Drive ICs · SOIC-8
FAN3229TMX from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INA+ | input | Non-inverting input to Channel A; connect to VDD to enable the output. |
| 2 | INA− | input | Inverting input to Channel A; connect to GND to enable the output. |
| 3 | GND | power_in | Ground; common ground reference for input and output circuits. |
| 4 | INB+ | input | Non-inverting input to Channel B; connect to VDD to enable the output. |
| 5 | OUTB | output | Gate drive output B; held LOW unless the required input(s) are present and VDD is above the UVLO threshold. |
| 6 | VDD | power_in | Supply voltage that provides power to the IC; recommended operating range is 4.5 V to 18.0 V. |
| 7 | OUTA | output | Gate drive output A; held LOW unless the required input(s) are present and VDD is above the UVLO threshold. |
| 8 | INB+ | input | Inverting input to Channel B; connect to GND to enable the output. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Operating Range | VDD | 4.5 | | 18 | V | | 6 |
| VDD Supply Voltage Range | VDD | 4.5 | | 18 | V | | 6 |
| Operating Ambient Temperature | TA | -40 | | 125 | °C | | 6 |
| Enable Voltage ENA and ENB | VEN | 0 | | | V | | 6 |
| Input Voltage INA, INA+, INA−, INB, INB+ and INB− | VIN | 0 | | | V | | 6 |
| VDD to GND | VDD | -0.3 | | 20 | V | | 6 |
| Lead Soldering Temperature | TL | | | 260 | °C | 10 seconds | 6 |
| Junction Temperature | TJ | -55 | | 150 | °C | | 6 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 6 |
| Supply Current, Inputs/EN Not Connected (TTL) | IDD | | 0.75 | 1.2 | mA | Inputs/EN Not Connected, TTL | 6 |
| Turn-On Voltage | VON | 3.5 | 3.9 | 4.3 | V | INA = ENA = VDD, INB = ENB = 0 V | 6 |
| Turn-Off Voltage | VOFF | 3.3 | 3.7 | 4.1 | V | INA = ENA = VDD, INB = ENB = 0 V | 6 |
| INx Logic Low Threshold (TTL) | VINL_T | 0.8 | 1.2 | | V | | 6 |
| INx Logic High Threshold (TTL) | VINH_T | | 1.6 | 2 | V | | 6 |
| TTL Logic Hysteresis Voltage | VHYS_T | 0.2 | 0.4 | 0.8 | V | | 6 |
| Non-Inverting Input Current (FAN322xT) | IIN+ | -1 | | 175 | A | IN from 0 to VDD | 6 |
| Inverting Input Current (FAN322xT) | IIN− | -175 | | 1 | A | IN from 0 to VDD | 6 |
| Output Rise Time | tRISE | | 12 | 22 | ns | CLOAD = 1000 pF | 7 |
| Output Fall Time | tFALL | | 9 | 17 | ns | CLOAD = 1000 pF | 7 |
| Output Propagation Delay, TTL Inputs (tD1) | tD1 | 10 | 19 | 34 | ns | TTL Input | 7 |
| Output Propagation Delay, TTL Inputs (tD2) | tD2 | 10 | 18 | 32 | ns | TTL Input | 7 |
| Propagation Matching Between Channels | tDEL.MATCH | | 1 | 2 | ns | INA = INB, OUTA and OUTB at 50% Point | 7 |
| Junction-to-Ambient Thermal Resistance (SOIC-8) | θJA | | 89 | | °C/W | Natural convection, 2S2P JEDEC board (Note 4) | 2 |
| Junction-to-Lead Thermal Resistance (SOIC-8) | θJL | | 40 | | °C/W | Note 2 | 2 |
| Junction-to-Top Thermal Resistance (SOIC-8) | θJT | | 31 | | °C/W | Note 3 | 2 |
| Junction-to-Board Thermal Characterization (SOIC-8) | ψJB | | 43 | | °C/W | Note 5 | 2 |
| Junction-to-Top Characterization (SOIC-8) | ψJT | | 3 | | °C/W | Note 6 | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | is defined as the PCB copper adjacent to pin 6. | 2 |
## CAD (KiCad official)
- Symbol: `FAN3229TMX`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `fan3229tmx-etched.step` / `fan3229tmx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fan3229tmx.step` / `fan3229tmx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/fan3229tmx-d.pdf) (24 pp, sha256 `f55d278161a01be4`, retrieved 2026-10-29, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fan3229tmx-datasheet.pdf)