component
F280049PMS
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+101@@ -0,0 +1,101 @@+# F280049PMS++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++F280049PMS from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GPIO29 | bidirectional | General Purpose Input/Output 29 with programmable functionality including communication and control peripherals. |+| 2 | GPIO28 | bidirectional | General Purpose Input/Output 28 with programmable functionality including communication and control peripherals. |+| 3 | XRSn | bidirectional | Device Reset input and Watchdog Reset output with internal pull-up; tie between 2.2kΩ to 10kΩ to VDDIO. |+| 4 | VDD | power_in | 1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin. |+| 5 | VSS | power_in | Digital ground connection. |+| 6 | A6 | input | ADC-A input 6 with optional multiplex to PGA-5 output filter (PGA5_OF). |+| 7 | B2 | input | ADC-B input 2 with optional multiplex to ADC-C input 6 (C6) or PGA-3 output filter (PGA3_OF). |+| 8 | B3 | input | ADC-B input 3 with optional external reference voltage for on-chip DAC (VDAC) and comparator inputs. |+| 9 | A2 | input | ADC-A input 2 with optional multiplex to ADC-B input 6 (B6) or PGA-1 output filter (PGA1_OF). |+| 10 | PGA1_GND | passive | PGA-1, PGA-3, and PGA-5 ground connection for Kelvin reference; connect to VSSA. |+| 11 | C4 | input | ADC-C input 4 with optional multiplex to PGA-5 input (PGA5_IN). |+| 12 | C0 | input | ADC-C input 0 with optional multiplex to PGA-1 input (PGA1_IN). |+| 13 | C2 | input | ADC-C input 2 with optional multiplex to PGA-3 input (PGA3_IN). |+| 14 | A1 | bidirectional | ADC-A input 1 with multiplex option to Buffered DAC-B output (DACB_OUT). |+| 15 | A0 | bidirectional | ADC-A input 0 with multiplex options to ADC-B input 15 (B15), ADC-C input 15 (C15), or Buffered DAC-A output (DACA_OUT). |+| 16 | VREFHIA | power_in | ADC-A, ADC-B, and ADC-C high reference voltage input/output; place minimum 2.2µF capacitor between this pin and VREFLO; do not load externally. |+| 17 | VREFLOA | power_in | ADC-A, ADC-B, and ADC-C low reference voltage input at 0V nominal. |+| 18 | C1 | input | ADC-C input 1 with optional multiplex to PGA-2 input (PGA2_IN). |+| 19 | C3 | input | ADC-C input 3 with optional multiplex to PGA-4 input (PGA4_IN). |+| 20 | PGA2_GND | passive | PGA-2, PGA-4, and PGA-6 ground connection for Kelvin reference; connect to VSSA. |+| 21 | VSSA | power_in | Analog ground connection. |+| 22 | VDDA | power_in | 3.3V analog power supply pin; place minimum 2.2µF bypass capacitor connected to VSSA. |+| 23 | A4 | input | ADC-A input 4 with optional multiplex to ADC-B input 8 (B8) or PGA-2 output filter (PGA2_OF). |+| 24 | B4 | input | ADC-B input 4 with optional multiplex to ADC-C input 8 (C8) or PGA-4 output filter (PGA4_OF). |+| 25 | A10 | input | ADC-A input 10 with optional multiplex to ADC-B input 1 (B1), ADC-C input 10 (C10), or PGA-7 output filter (PGA7_OF). |+| 26 | VSS | power_in | Digital ground connection. |+| 27 | VDD | power_in | 1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin. |+| 28 | VDDIO | power_in | 3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin. |+| 29 | GPIO13 | bidirectional | General Purpose Input/Output 13 with programmable functionality including communication and control peripherals. |+| 30 | GPIO12 | bidirectional | General Purpose Input/Output 12 with programmable functionality including communication and control peripherals. |+| 31 | GPIO11 | bidirectional | General Purpose Input/Output 11 with programmable functionality including communication and control peripherals. |+| 32 | GPIO33 | bidirectional | General Purpose Input/Output 33 with programmable functionality including communication and control peripherals. |+| 33 | GPIO16 | bidirectional | General Purpose Input/Output 16 with programmable functionality including communication and control peripherals. |+| 34 | GPIO17 | bidirectional | General Purpose Input/Output 17 with programmable functionality including communication and control peripherals. |+| 35 | GPIO24 | bidirectional | General Purpose Input/Output 24 with programmable functionality including communication and control peripherals. |+| 36 | TCK | input | JTAG Test Clock input with internal pull-up resistor for boundary scan interface. |+| 37 | GPIO37 | bidirectional | General Purpose Input/Output 37 with default function JTAG Test Data Output (TDO); place external pull-up resistor when used as TDO. |+| 38 | TMS | input | JTAG Test Mode Select with internal pull-up; place external 2.2kΩ pull-up to VDDIO to maintain JTAG in reset during normal operation. |+| 39 | GPIO35 | bidirectional | General Purpose Input/Output 35 with default function JTAG Test Data Input (TDI); enable or provide external pull-up to avoid floating input. |+| 40 | GPIO32 | bidirectional | General Purpose Input/Output 32 with programmable functionality including communication and control peripherals. |+| 41 | GPIO18_X2 | bidirectional | General Purpose Input/Output 18 or crystal oscillator output (X2); use only when INTOSC provides system clock and X1 has external pull-down. |+| 42 | X1 | bidirectional | Crystal oscillator input or single-ended 3.3V clock input; connect quartz crystal between X1 and X2 or drive from external clock source. |+| 43 | VDDIO | power_in | 3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin. |+| 44 | VDD | power_in | 1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin. |+| 45 | VSS | power_in | Digital ground connection. |+| 46 | VREGENZ | input | Internal regulator enable with internal pull-down; tie to VSS (low) to enable internal VREG or to VDDIO (high) to use external power supply. |+| 47 | GPIO8 | bidirectional | General Purpose Input/Output 8 with programmable functionality including communication and control peripherals. |+| 48 | GPIO4 | bidirectional | General Purpose Input/Output 4 with programmable functionality including communication and control peripherals. |+| 49 | GPIO3 | bidirectional | General Purpose Input/Output 3 with programmable functionality including communication and control peripherals. |+| 50 | GPIO2 | bidirectional | General Purpose Input/Output 2 with programmable functionality including communication and control peripherals. |+| 51 | GPIO1 | bidirectional | General Purpose Input/Output 1 with programmable functionality including communication and control peripherals. |+| 52 | GPIO0 | bidirectional | General Purpose Input/Output 0 with programmable functionality including communication and control peripherals. |+| 53 | VDDIO_SW | power_in | 3.3V power supply input for internal DC-DC regulator; place 20µF input capacitor on this pin when using internal DC-DC regulator. |+| 54 | GPIO23_VSW | bidirectional | General Purpose Input/Output 23 or internal DC-DC regulator switch output (VSW); configured via DCDCCTL register; internal capacitance approximately 100pF. |+| 55 | VSS_SW | power_in | Internal DC-DC regulator ground; must be connected to VSS pin. |+| 56 | GPIO22_VFBSW | bidirectional | General Purpose Input/Output 22 or internal DC-DC regulator feedback signal (VFBSW); configured via DCDCCTL register for direct DC-DC mode by default. |+| 57 | GPIO7 | bidirectional | General Purpose Input/Output 7 with programmable functionality including communication and control peripherals. |+| 58 | VSS | power_in | Digital ground connection. |+| 59 | VDD | power_in | 1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin. |+| 60 | VDDIO | power_in | 3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin. |+| 61 | GPIO5 | bidirectional | General Purpose Input/Output 5 with programmable functionality including communication and control peripherals. |+| 62 | GPIO9 | bidirectional | General Purpose Input/Output 9 with programmable functionality including communication and control peripherals. |+| 63 | GPIO10 | bidirectional | General Purpose Input/Output 10 with programmable functionality including communication and control peripherals. |+| 64 | GPIO6 | bidirectional | General Purpose Input/Output 6 with programmable functionality including communication and control peripherals. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `F280049PMS`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `f280049pms-etched.step` / `f280049pms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `f280049pms.step` / `f280049pms.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tms320f280049) (277 pp, sha256 `867e7bb5ada6819c`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/f280049pms-datasheet.pdf)
page.jsonadded+536@@ -0,0 +1,536 @@+{+ "slug": "f280049pms",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "f280049pms",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "f280049pms.kicad_sym",+ "f280049pms.kicad_mod",+ "f280049pms.glb",+ "f280049pms.step",+ "f280049pms.lbr",+ "docs/hero.png",+ "docs/f280049pms-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "f280049pms-hero.glb",+ "f280049pms-hero.overlay.json"+ ],+ "component": {+ "mpn": "F280049PMS",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f280049",+ "parts": {+ "symbol": "f280049pms.kicad_sym",+ "footprint": "f280049pms.kicad_mod",+ "model_3d": "f280049pms-hero.glb",+ "model_3d_plain": "f280049pms.glb",+ "model_3d_step": "f280049pms-etched.step",+ "model_3d_step_plain": "f280049pms.step",+ "lbr": "f280049pms.lbr"+ },+ "distributor_links": {+ "lcsc": "C192060",+ "digikey": "296-49638-ND",+ "mouser": "595-F280049PMS"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T02:52:15Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-49638-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-F280049PMS",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GPIO29",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 29 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "2",+ "name": "GPIO28",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 28 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "3",+ "name": "XRSn",+ "type": "bidirectional",+ "description": "Device Reset input and Watchdog Reset output with internal pull-up; tie between 2.2kΩ to 10kΩ to VDDIO."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin."+ },+ {+ "number": "5",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground connection."+ },+ {+ "number": "6",+ "name": "A6",+ "type": "input",+ "description": "ADC-A input 6 with optional multiplex to PGA-5 output filter (PGA5_OF)."+ },+ {+ "number": "7",+ "name": "B2",+ "type": "input",+ "description": "ADC-B input 2 with optional multiplex to ADC-C input 6 (C6) or PGA-3 output filter (PGA3_OF)."+ },+ {+ "number": "8",+ "name": "B3",+ "type": "input",+ "description": "ADC-B input 3 with optional external reference voltage for on-chip DAC (VDAC) and comparator inputs."+ },+ {+ "number": "9",+ "name": "A2",+ "type": "input",+ "description": "ADC-A input 2 with optional multiplex to ADC-B input 6 (B6) or PGA-1 output filter (PGA1_OF)."+ },+ {+ "number": "10",+ "name": "PGA1_GND",+ "type": "passive",+ "description": "PGA-1, PGA-3, and PGA-5 ground connection for Kelvin reference; connect to VSSA."+ },+ {+ "number": "11",+ "name": "C4",+ "type": "input",+ "description": "ADC-C input 4 with optional multiplex to PGA-5 input (PGA5_IN)."+ },+ {+ "number": "12",+ "name": "C0",+ "type": "input",+ "description": "ADC-C input 0 with optional multiplex to PGA-1 input (PGA1_IN)."+ },+ {+ "number": "13",+ "name": "C2",+ "type": "input",+ "description": "ADC-C input 2 with optional multiplex to PGA-3 input (PGA3_IN)."+ },+ {+ "number": "14",+ "name": "A1",+ "type": "bidirectional",+ "description": "ADC-A input 1 with multiplex option to Buffered DAC-B output (DACB_OUT)."+ },+ {+ "number": "15",+ "name": "A0",+ "type": "bidirectional",+ "description": "ADC-A input 0 with multiplex options to ADC-B input 15 (B15), ADC-C input 15 (C15), or Buffered DAC-A output (DACA_OUT)."+ },+ {+ "number": "16",+ "name": "VREFHIA",+ "type": "power_in",+ "description": "ADC-A, ADC-B, and ADC-C high reference voltage input/output; place minimum 2.2µF capacitor between this pin and VREFLO; do not load externally."+ },+ {+ "number": "17",+ "name": "VREFLOA",+ "type": "power_in",+ "description": "ADC-A, ADC-B, and ADC-C low reference voltage input at 0V nominal."+ },+ {+ "number": "18",+ "name": "C1",+ "type": "input",+ "description": "ADC-C input 1 with optional multiplex to PGA-2 input (PGA2_IN)."+ },+ {+ "number": "19",+ "name": "C3",+ "type": "input",+ "description": "ADC-C input 3 with optional multiplex to PGA-4 input (PGA4_IN)."+ },+ {+ "number": "20",+ "name": "PGA2_GND",+ "type": "passive",+ "description": "PGA-2, PGA-4, and PGA-6 ground connection for Kelvin reference; connect to VSSA."+ },+ {+ "number": "21",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground connection."+ },+ {+ "number": "22",+ "name": "VDDA",+ "type": "power_in",+ "description": "3.3V analog power supply pin; place minimum 2.2µF bypass capacitor connected to VSSA."+ },+ {+ "number": "23",+ "name": "A4",+ "type": "input",+ "description": "ADC-A input 4 with optional multiplex to ADC-B input 8 (B8) or PGA-2 output filter (PGA2_OF)."+ },+ {+ "number": "24",+ "name": "B4",+ "type": "input",+ "description": "ADC-B input 4 with optional multiplex to ADC-C input 8 (C8) or PGA-4 output filter (PGA4_OF)."+ },+ {+ "number": "25",+ "name": "A10",+ "type": "input",+ "description": "ADC-A input 10 with optional multiplex to ADC-B input 1 (B1), ADC-C input 10 (C10), or PGA-7 output filter (PGA7_OF)."+ },+ {+ "number": "26",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground connection."+ },+ {+ "number": "27",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin."+ },+ {+ "number": "28",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin."+ },+ {+ "number": "29",+ "name": "GPIO13",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 13 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "30",+ "name": "GPIO12",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 12 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "31",+ "name": "GPIO11",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 11 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "32",+ "name": "GPIO33",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 33 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "33",+ "name": "GPIO16",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 16 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "34",+ "name": "GPIO17",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 17 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "35",+ "name": "GPIO24",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 24 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "36",+ "name": "TCK",+ "type": "input",+ "description": "JTAG Test Clock input with internal pull-up resistor for boundary scan interface."+ },+ {+ "number": "37",+ "name": "GPIO37",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 37 with default function JTAG Test Data Output (TDO); place external pull-up resistor when used as TDO."+ },+ {+ "number": "38",+ "name": "TMS",+ "type": "input",+ "description": "JTAG Test Mode Select with internal pull-up; place external 2.2kΩ pull-up to VDDIO to maintain JTAG in reset during normal operation."+ },+ {+ "number": "39",+ "name": "GPIO35",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 35 with default function JTAG Test Data Input (TDI); enable or provide external pull-up to avoid floating input."+ },+ {+ "number": "40",+ "name": "GPIO32",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 32 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "41",+ "name": "GPIO18_X2",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 18 or crystal oscillator output (X2); use only when INTOSC provides system clock and X1 has external pull-down."+ },+ {+ "number": "42",+ "name": "X1",+ "type": "bidirectional",+ "description": "Crystal oscillator input or single-ended 3.3V clock input; connect quartz crystal between X1 and X2 or drive from external clock source."+ },+ {+ "number": "43",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin."+ },+ {+ "number": "44",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin."+ },+ {+ "number": "45",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground connection."+ },+ {+ "number": "46",+ "name": "VREGENZ",+ "type": "input",+ "description": "Internal regulator enable with internal pull-down; tie to VSS (low) to enable internal VREG or to VDDIO (high) to use external power supply."+ },+ {+ "number": "47",+ "name": "GPIO8",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 8 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "48",+ "name": "GPIO4",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 4 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "49",+ "name": "GPIO3",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 3 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "50",+ "name": "GPIO2",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 2 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "51",+ "name": "GPIO1",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 1 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "52",+ "name": "GPIO0",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 0 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "53",+ "name": "VDDIO_SW",+ "type": "power_in",+ "description": "3.3V power supply input for internal DC-DC regulator; place 20µF input capacitor on this pin when using internal DC-DC regulator."+ },+ {+ "number": "54",+ "name": "GPIO23_VSW",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 23 or internal DC-DC regulator switch output (VSW); configured via DCDCCTL register; internal capacitance approximately 100pF."+ },+ {+ "number": "55",+ "name": "VSS_SW",+ "type": "power_in",+ "description": "Internal DC-DC regulator ground; must be connected to VSS pin."+ },+ {+ "number": "56",+ "name": "GPIO22_VFBSW",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 22 or internal DC-DC regulator feedback signal (VFBSW); configured via DCDCCTL register for direct DC-DC mode by default."+ },+ {+ "number": "57",+ "name": "GPIO7",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 7 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "58",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground connection."+ },+ {+ "number": "59",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2V digital logic power supply pin; place minimum 20µF total bypass capacitance near this pin."+ },+ {+ "number": "60",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3V digital I/O power supply pin; place minimum 0.1µF bypass capacitor on this pin."+ },+ {+ "number": "61",+ "name": "GPIO5",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 5 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "62",+ "name": "GPIO9",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 9 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "63",+ "name": "GPIO10",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 10 with programmable functionality including communication and control peripherals."+ },+ {+ "number": "64",+ "name": "GPIO6",+ "type": "bidirectional",+ "description": "General Purpose Input/Output 6 with programmable functionality including communication and control peripherals."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Several pins have multiple multiplex functions (analog inputs with PGA connections and DAC outputs) ; GPIO18_X2 (pin 41) has constraints per datasheet: only usable when INTOSC provides system clock and ; GPIO23_VSW (pin 54) and GPIO22_VFBSW (pin 56) have DC-DC mode configuration; must be explicitly disa"+ ],+ "pages_sent": 146,+ "cost_usd": 1.2023,+ "at": "2026-10-07T02:51:50"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tms320f280049",+ "pages": 277,+ "sha256": "867e7bb5ada6819c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "f280049pms.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "f280049pms-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "29e48a788a33b1f4b912d5b1a767fc1c63852de0dc07e600010fe5f6201d9d3b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}