component
F280040PMQR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "f280040pmqr",
"title": "F280040PMQR",
"brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"f280040pmqr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "F280040PMQR",
"manufacturer": "Texas Instruments",
"package": "LQFP-64(10x10)",
"pin_count": 64,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tms320f280045",
"parts": {
"symbol": "f280040pmqr.kicad_sym",
"footprint": "f280040pmqr.kicad_mod",
"model_3d": "f280040pmqr-hero.glb",
"model_3d_plain": "f280040pmqr.glb",
"model_3d_step": "f280040pmqr-etched.step",
"model_3d_step_plain": "f280040pmqr.step",
"lbr": "f280040pmqr.lbr"
},
"distributor_links": {
"lcsc": "C2055973",
"digikey": "296-F280040PMQRTR-ND",
"mouser": "595-F280040PMQR"
},
"distributor_check": {
"checked_at": "2026-10-08T15:00:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-F280040PMQRTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-F280040PMQR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GPIO29",
"type": "bidirectional",
"description": "General-purpose I/O 29 (default GPIO function); also muxed to SCI-A TX, ePWM7B, EQEP1B, LIN-A RX, SPI-B STE and ERRORSTS."
},
{
"number": "2",
"name": "GPIO28",
"type": "bidirectional",
"description": "General-purpose I/O 28 (default GPIO function); also muxed to SCI-A RX, ePWM7A, EQEP1A, LIN-A TX, SPI-B CLK and ERRORSTS."
},
{
"number": "3",
"name": "XRSn",
"type": "bidirectional",
"description": "Device reset input and watchdog reset output, open-drain with internal pullup; place a 2.2 kΩ to 10 kΩ resistor between XRSn and VDDIO and at most 100 nF to VSS."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "5",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "6",
"name": "A6/PGA5_OF",
"type": "passive",
"description": "ADC-A analog input 6; also PGA-5 output filter (optional)."
},
{
"number": "7",
"name": "B2/C6/PGA3_OF",
"type": "passive",
"description": "ADC-B analog input 2 and ADC-C analog input 6; also PGA-3 output filter (optional)."
},
{
"number": "8",
"name": "B3/VDAC",
"type": "passive",
"description": "ADC-B analog input 3; VDAC is the optional external reference for the on-chip DAC, has an internal 100 pF capacitor to VSSA that cannot be disabled, and needs at least 1 µF if used as DAC reference."
},
{
"number": "9",
"name": "A2/B6/PGA1_OF",
"type": "passive",
"description": "ADC-A analog input 2 and ADC-B analog input 6; also PGA-1 output filter (optional)."
},
{
"number": "10",
"name": "PGA1_GND/PGA3_GND/PGA5_GND",
"type": "power_in",
"description": "Kelvin ground reference for PGA-1, PGA-3 and PGA-5; ideally equal to VSSA."
},
{
"number": "11",
"name": "C4/PGA5_IN",
"type": "passive",
"description": "ADC-C analog input 4; PGA-5 amplifier input."
},
{
"number": "12",
"name": "C0/PGA1_IN",
"type": "passive",
"description": "ADC-C analog input 0; PGA-1 amplifier input."
},
{
"number": "13",
"name": "C2/PGA3_IN",
"type": "passive",
"description": "ADC-C analog input 2; PGA-3 amplifier input."
},
{
"number": "14",
"name": "A1/DACB_OUT",
"type": "passive",
"description": "ADC-A analog input 1; also buffered DAC-B output."
},
{
"number": "15",
"name": "A0/B15/C15/DACA_OUT",
"type": "passive",
"description": "ADC-A analog input 0 (also ADC-B 15 and ADC-C 15); also buffered DAC-A output."
},
{
"number": "16",
"name": "VREFHIA/VREFHIB/VREFHIC",
"type": "bidirectional",
"description": "ADC high reference; driven externally in external reference mode, driven by the device in internal reference mode; place at least 2.2 µF between VREFHIx and VREFLOx close to the device and do not load externally."
},
{
"number": "17",
"name": "VREFLOA/VREFLOB/VREFLOC",
"type": "input",
"description": "ADC low reference voltage input for ADC-A, ADC-B and ADC-C."
},
{
"number": "18",
"name": "C1/PGA2_IN",
"type": "passive",
"description": "ADC-C analog input 1; PGA-2 amplifier input."
},
{
"number": "19",
"name": "C3/PGA4_IN",
"type": "passive",
"description": "ADC-C analog input 3; PGA-4 amplifier input."
},
{
"number": "20",
"name": "PGA2_GND/PGA4_GND/PGA6_GND",
"type": "power_in",
"description": "Kelvin ground reference for PGA-2, PGA-4 and PGA-6; ideally equal to VSSA."
},
{
"number": "21",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground for the ADC, PGA, CMPSS and DAC circuits."
},
{
"number": "22",
"name": "VDDA",
"type": "power_in",
"description": "3.3 V analog supply; place at least 2.2 µF decoupling to VSSA."
},
{
"number": "23",
"name": "A4/B8/PGA2_OF",
"type": "passive",
"description": "ADC-A analog input 4 and ADC-B analog input 8; also PGA-2 output filter (optional)."
},
{
"number": "24",
"name": "B4/C8/PGA4_OF",
"type": "passive",
"description": "ADC-B analog input 4 and ADC-C analog input 8; also PGA-4 output filter (optional)."
},
{
"number": "25",
"name": "A10/B1/C10/PGA7_OF",
"type": "passive",
"description": "ADC-A analog input 10, ADC-B analog input 1 and ADC-C analog input 10; also PGA-7 output filter (optional)."
},
{
"number": "26",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "27",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "28",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place at least 0.1 µF decoupling on each VDDIO pin."
},
{
"number": "29",
"name": "FLT2",
"type": "unconnected",
"description": "Flash test pin 2, reserved for TI; must be left unconnected (or tied to VSS through 4.7 kΩ or more)."
},
{
"number": "30",
"name": "FLT1",
"type": "unconnected",
"description": "Flash test pin 1, reserved for TI; must be left unconnected (or tied to VSS through 4.7 kΩ or more)."
},
{
"number": "31",
"name": "GPIO11",
"type": "bidirectional",
"description": "General-purpose I/O 11 (default GPIO function); also muxed to ePWM6B, SCI-B RX, OUTPUTXBAR7, EQEP1B, SPI-A STE and FSIRX-A D1."
},
{
"number": "32",
"name": "GPIO33",
"type": "bidirectional",
"description": "General-purpose I/O 33 (default GPIO function); also muxed to I2C-A SCL (open-drain), SPI-B STE, OUTPUTXBAR4, LIN-A RX, SD1 C3, FSIRX-A CLK and CAN-A RX."
},
{
"number": "33",
"name": "GPIO16",
"type": "bidirectional",
"description": "General-purpose I/O 16 (default GPIO function); also muxed to SPI-A SIMO, CAN-B TX, ePWM5A, SCI-A TX, SD1 D1 and XCLKOUT."
},
{
"number": "34",
"name": "GPIO17",
"type": "bidirectional",
"description": "General-purpose I/O 17 (default GPIO function); also muxed to SPI-A SOMI, CAN-B RX, ePWM5B, SCI-A RX, SD1 C1 and PMBus-A SDA."
},
{
"number": "35",
"name": "GPIO24",
"type": "bidirectional",
"description": "General-purpose I/O 24 (default GPIO function); also muxed to OUTPUTXBAR1, eQEP2A, ePWM8A, SPI-B SIMO, SD1 D1, PMBus-A SCL, SCI-A TX and ERRORSTS."
},
{
"number": "36",
"name": "TCK",
"type": "input",
"description": "JTAG test clock input with internal pullup."
},
{
"number": "37",
"name": "GPIO37/TDO",
"type": "output",
"description": "JTAG test data output (default function); tri-stated when no JTAG activity, so an internal or external pullup is required to avoid a floating GPIO input."
},
{
"number": "38",
"name": "TMS",
"type": "bidirectional",
"description": "JTAG test mode select with internal pullup; datasheet recommends an external 2.2 kΩ pullup to VDDIO on the board."
},
{
"number": "39",
"name": "GPIO35/TDI",
"type": "input",
"description": "JTAG test data input (default function); internal pullup is disabled by default, so enable it or add an external pullup to avoid a floating input."
},
{
"number": "40",
"name": "GPIO32",
"type": "bidirectional",
"description": "General-purpose I/O 32 (default GPIO function); also muxed to I2C-A SDA, SPI-B CLK, ePWM8B, LIN-A TX, SD1 D3, FSIRX-A D0 and CAN-A TX."
},
{
"number": "41",
"name": "GPIO18_X2",
"type": "bidirectional",
"description": "GPIO18 (usable only when the system is clocked from INTOSC and X1 has an external pulldown, recommended 1 kΩ) or crystal oscillator output X2; also muxed to SPI-A CLK, SCI-B TX, CAN-A RX, ePWM6A, I2C-A SCL and SD1 D2."
},
{
"number": "42",
"name": "X1",
"type": "passive",
"description": "Crystal oscillator input or single-ended 3.3 V clock input; GPIO19 is internally tied to X1 and must remain an input with pullup disabled."
},
{
"number": "43",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place at least 0.1 µF decoupling on each VDDIO pin."
},
{
"number": "44",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "45",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "46",
"name": "VREGENZ",
"type": "input",
"description": "Internal regulator enable with internal pulldown: tie to VSS to enable the internal VREG, or to VDDIO to supply VDD externally."
},
{
"number": "47",
"name": "GPIO8",
"type": "bidirectional",
"description": "General-purpose I/O 8 (default GPIO function); also muxed to ePWM5A, CAN-B TX, ADCSOCAO, eQEP1 STROBE, SCI-A TX, SPI-A SIMO, I2C-A SCL and FSITX-A D1."
},
{
"number": "48",
"name": "GPIO4",
"type": "bidirectional",
"description": "General-purpose I/O 4 (default GPIO function); also muxed to ePWM3A, OUTPUTXBAR3, CAN-A TX and FSIRX-A CLK."
},
{
"number": "49",
"name": "GPIO3",
"type": "bidirectional",
"description": "General-purpose I/O 3 (default GPIO function); also muxed to ePWM2B, OUTPUTXBAR2, PMBus-A SCL, SPI-A CLK, SCI-A RX and FSIRX-A D0."
},
{
"number": "50",
"name": "GPIO2",
"type": "bidirectional",
"description": "General-purpose I/O 2 (default GPIO function); also muxed to ePWM2A, OUTPUTXBAR1, PMBus-A SDA, SCI-A TX and FSIRX-A D1."
},
{
"number": "51",
"name": "GPIO1",
"type": "bidirectional",
"description": "General-purpose I/O 1 (default GPIO function); also muxed to ePWM1B and I2C-A SCL (open-drain)."
},
{
"number": "52",
"name": "GPIO0",
"type": "bidirectional",
"description": "General-purpose I/O 0 (default GPIO function); also muxed to ePWM1A and I2C-A SDA (open-drain)."
},
{
"number": "53",
"name": "VDDIO_SW",
"type": "power_in",
"description": "3.3 V supply for the internal DC/DC regulator; must be tied to VDDIO, and about 20 µF input capacitance is required when the DC/DC is used."
},
{
"number": "54",
"name": "GPIO23_VSW",
"type": "bidirectional",
"description": "GPIO23 by default configured as the DC/DC switch output VSW when DCDCEN=1 (about 100 pF internal capacitance); usable as GPIO23 if the DC/DC is not used."
},
{
"number": "55",
"name": "VSS_SW",
"type": "power_in",
"description": "Internal DC/DC regulator ground; must be tied to VSS."
},
{
"number": "56",
"name": "GPIO22_VFBSW",
"type": "bidirectional",
"description": "GPIO22 by default configured as DC/DC feedback VFBSW when DCDCEN=1; if the internal DC/DC is used, connect this pin to the node where L(VSW) connects to the VDD rail, close to the device."
},
{
"number": "57",
"name": "GPIO7",
"type": "bidirectional",
"description": "General-purpose I/O 7 (default GPIO function); also muxed to ePWM4B, OUTPUTXBAR5, eQEP1B, CAN-B RX, SPI-B SIMO and FSITX-A CLK."
},
{
"number": "58",
"name": "VSS",
"type": "power_in",
"description": "Digital ground; must be connected to the board ground."
},
{
"number": "59",
"name": "VDD",
"type": "power_in",
"description": "1.2 V digital logic supply; TI recommends a minimum total of about 20 µF decoupling near the VDD pins."
},
{
"number": "60",
"name": "VDDIO",
"type": "power_in",
"description": "3.3 V digital I/O supply; place at least 0.1 µF decoupling on each VDDIO pin."
},
{
"number": "61",
"name": "GPIO5",
"type": "bidirectional",
"description": "General-purpose I/O 5 (default GPIO function); also muxed to ePWM3B, OUTPUTXBAR3, CAN-A RX, SPI-A STE and FSITX-A D1."
},
{
"number": "62",
"name": "GPIO9",
"type": "bidirectional",
"description": "General-purpose I/O 9 (default GPIO function); also muxed to ePWM5B, SCI-B TX, OUTPUTXBAR6, eQEP1 INDEX, SCI-A RX, SPI-A CLK and FSITX-A D0."
},
{
"number": "63",
"name": "GPIO10",
"type": "bidirectional",
"description": "General-purpose I/O 10 (default GPIO function); also muxed to ePWM6A, CAN-B RX, ADCSOCBO, eQEP1A, SCI-B TX, SPI-A SOMI, I2C-A SDA and FSITX-A CLK."
},
{
"number": "64",
"name": "GPIO6",
"type": "bidirectional",
"description": "General-purpose I/O 6 (default GPIO function); also muxed to ePWM4A, OUTPUTXBAR4, SYNCOUT, eQEP1A, CAN-B TX, SPI-B SOMI and FSITX-A D0."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN F280040PMQR is not listed verbatim in the datasheet. The PMQ suffix denotes the 64-pin PM Q-temp; Pins 29 (FLT2) and 30 (FLT1) are TI-reserved flash test pins. The datasheet says they must be left u; Pin descriptions are condensed. Each lists the primary function, the default GPIO function where app"
],
"pages_sent": 146,
"cost_usd": 1.0598,
"at": "2026-10-08T14:59:54"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tms320f280045",
"pages": 277,
"sha256": "867e7bb5ada6819c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "f280040pmqr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12,
12,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "f280040pmqr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12,
12,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "ccf554d7df1507ff019a15e39c401420b31577eeca04d9d683e90ee1b2a785f7",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "LQFP-64(10x10)",
"Category": "Embedded Processors & Controllers",
"Pins": "64"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"f280040pmqr"
],
"discovery_pitch": "F280040PMQR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"f280040pmqr.kicad_sym",
"f280040pmqr.kicad_mod",
"f280040pmqr.glb",
"f280040pmqr.step",
"f280040pmqr.lbr",
"docs/hero.png",
"docs/f280040pmqr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"f280040pmqr-hero.glb",
"f280040pmqr-hero.overlay.json"
],
"visibility": {
"public": true
}
}