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F280039CSPN

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by adom

Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersf280039cspnfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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F280039CSPN

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)

F280039CSPN from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPIO30 bidirectional General-purpose I/O 30 or CANA_RX CAN-A receive
2 GPIO31 bidirectional General-purpose I/O 31 or CANA_TX CAN-A transmit
3 GPIO29 bidirectional General-purpose I/O 29 or SCIA_TX SCI-A transmit
4 GPIO28 bidirectional General-purpose I/O 28 or SCIA_RX SCI-A receive
5 XRSn tri_state Device reset input and watchdog reset output open-drain with internal pull-up
6 GPIO46 bidirectional General-purpose I/O 46 or LINA_TX LIN-A transmit
7 VDDIO power_in 3.3V digital I/O supply voltage with internal connection to all I/O banks
8 VDD power_in 1.2V core supply voltage from internal VREG or external source
9 VSS power_in Digital ground reference
10 A6 input ADC-A input channel 6 or CMP1_HP2 comparator 1 high positive input 2
11 B2/C6 input ADC-B input 2 and ADC-C input 6 or CMP3_HP0 comparator 3 high positive input 0
12 A3/B3/C5/VDAC input ADC-A input 3 ADC-B input 3 ADC-C input 5 or external reference for DAC
13 A2/B6/C9 input ADC-A input 2 ADC-B input 6 ADC-C input 9 or CMP1_HP0 comparator 1 high positive input 0
14 A15/B9/C7 input ADC-A input 15 ADC-B input 9 ADC-C input 7 or HRCAP capture input
15 A14/B14/C4 input ADC-A input 14 ADC-B input 14 ADC-C input 4 or CMP3_HP4 comparator 3 high positive input 4
16 A11/B10/C0 input ADC-A input 11 ADC-B input 10 ADC-C input 0 or CMP1_HN1 comparator 1 high negative input 1
17 A5/B12/C2 input ADC-A input 5 ADC-B input 12 ADC-C input 2 or CMP3_HN1 comparator 3 high negative input 1
18 A1/B7/DACB_OUT input ADC-A input 1 ADC-B input 7 or DACB_OUT buffered DAC-B output
19 A0/B15/C15/DACA_OUT input ADC-A input 0 ADC-B input 15 ADC-C input 15 or DACA_OUT buffered DAC-A output
20 VREFHI input ADC high reference voltage driven externally or by internal 1.65V/2.5V bandgap reference
21 VREFLO input ADC low reference voltage typically connected to VSSA
22 A12/C1 input ADC-A input 12 ADC-C input 1 or CMP4_HP2 comparator 4 high positive input 2
23 A7/C3 input ADC-A input 7 ADC-C input 3 or CMP4_HN1 comparator 4 high negative input 1
24 A8/B0/C11 input ADC-A input 8 ADC-B input 0 ADC-C input 11 or CMP4_HP4 comparator 4 high positive input 4
25 VSSA power_in Analog ground reference for ADC and analog peripherals
26 VDDA power_in 3.3V analog supply voltage with minimum 2.2µF decoupling capacitor
27 A4/B8/C14 input ADC-A input 4 ADC-B input 8 ADC-C input 14 or CMP2_HP0 comparator 2 high positive input 0
28 A9/B4/C8 input ADC-A input 9 ADC-B input 4 ADC-C input 8 or CMP4_HP0 comparator 4 high positive input 0
29 A10/B1/C10 input ADC-A input 10 ADC-B input 1 ADC-C input 10 or CMP2_HN0 comparator 2 high negative input 0
30 VSS power_in Digital ground reference
31 VDD power_in 1.2V core supply voltage from internal VREG or external source
32 VDDIO power_in 3.3V digital I/O supply voltage with internal connection to all I/O banks
33 B5/GPIO20 bidirectional AGPIO pin with dual ADC-B input 5 or GPIO20 general-purpose I/O
34 B11/GPIO21 bidirectional AGPIO pin with dual ADC-B input 11 or GPIO21 general-purpose I/O
35 GPIO13 bidirectional General-purpose I/O 13 or EPWM7_B ePWM-7 output B
36 GPIO12 bidirectional General-purpose I/O 12 or EPWM7_A ePWM-7 output A
37 GPIO11 bidirectional General-purpose I/O 11 or EPWM6_B ePWM-6 output B
38 GPIO33 bidirectional General-purpose I/O 33 or I2CA_SCL I2C-A open-drain clock
39 GPIO16 bidirectional General-purpose I/O 16 or SPIA_SIMO SPI-A master-out slave-in
40 GPIO17 bidirectional General-purpose I/O 17 or SPIA_SOMI SPI-A master-in slave-out
41 GPIO24 bidirectional General-purpose I/O 24 or OUTPUTXBAR1 output X-BAR output 1
42 GPIO25 bidirectional General-purpose I/O 25 or OUTPUTXBAR2 output X-BAR output 2
43 GPIO26 bidirectional General-purpose I/O 26 or OUTPUTXBAR3 output X-BAR output 3
44 GPIO27 bidirectional General-purpose I/O 27 or OUTPUTXBAR4 output X-BAR output 4
45 TCK input JTAG test clock with internal pull-up at 10MHz maximum for standard operation
46 GPIO37/TDO output GPIO37 or TDO JTAG test data output tri-state with internal pull-up
47 TMS bidirectional JTAG test mode select with internal pull-up for TAP controller timing
48 GPIO35/TDI input GPIO35 or TDI JTAG test data input with internal pull-up for default operation
49 GPIO32 bidirectional General-purpose I/O 32 or I2CA_SDA I2C-A open-drain data
50 GPIO18/X2 bidirectional GPIO18 or X2 crystal oscillator output from XTAL buffer
51 GPIO19/X1 bidirectional GPIO19 or X1 crystal oscillator input or single-ended clock input
52 VDDIO power_in 3.3V digital I/O supply voltage with internal connection to all I/O banks
53 VDD power_in 1.2V core supply voltage from internal VREG or external source
54 GPIO43 bidirectional General-purpose I/O 43 or OUTPUTXBAR6 output X-BAR output 6
55 VSS power_in Digital ground reference
56 GPIO39 bidirectional General-purpose I/O 39 or MCAN_RX CAN FD receive
57 GPIO42 bidirectional General-purpose I/O 42 or LINA_RX LIN-A receive
58 GPIO8 bidirectional General-purpose I/O 8 or EPWM5_A ePWM-5 output A
59 GPIO4 bidirectional General-purpose I/O 4 or EPWM3_A ePWM-3 output A
60 GPIO3 bidirectional General-purpose I/O 3 or EPWM2_B ePWM-2 output B
61 GPIO2 bidirectional General-purpose I/O 2 or EPWM2_A ePWM-2 output A
62 GPIO1 bidirectional General-purpose I/O 1 or EPWM1_B ePWM-1 output B
63 GPIO0 bidirectional General-purpose I/O 0 or EPWM1_A ePWM-1 output A
64 GPIO40 bidirectional General-purpose I/O 40 or SPIB_SIMO SPI-B master-out slave-in
65 GPIO23 bidirectional General-purpose I/O 23 or EQEP1_INDEX eQEP-1 index pulse
66 GPIO41 bidirectional General-purpose I/O 41 or EPWM2_A ePWM-2 output A
67 GPIO22 bidirectional General-purpose I/O 22 or EQEP1_STROBE eQEP-1 strobe pulse
68 GPIO7 bidirectional General-purpose I/O 7 or EPWM4_B ePWM-4 output B
69 GPIO44 bidirectional General-purpose I/O 44 or OUTPUTXBAR7 output X-BAR output 7
70 VSS power_in Digital ground reference
71 VDD power_in 1.2V core supply voltage from internal VREG or external source
72 VDDIO power_in 3.3V digital I/O supply voltage with internal connection to all I/O banks
73 GPIO45 bidirectional General-purpose I/O 45 or OUTPUTXBAR8 output X-BAR output 8
74 GPIO5 bidirectional General-purpose I/O 5 or EPWM3_B ePWM-3 output B
75 GPIO9 bidirectional General-purpose I/O 9 or EPWM5_B ePWM-5 output B
76 GPIO10 bidirectional General-purpose I/O 10 or EPWM6_A ePWM-6 output A
77 GPIO34 bidirectional General-purpose I/O 34 or OUTPUTXBAR1 output X-BAR output 1
78 GPIO15 bidirectional General-purpose I/O 15 or EPWM8_B ePWM-8 output B
79 GPIO14 bidirectional General-purpose I/O 14 or EPWM8_A ePWM-8 output A
80 GPIO6 bidirectional General-purpose I/O 6 or EPWM4_A ePWM-4 output A

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-80(12x12)
Category Embedded Processors & Controllers
Pins 80

CAD (KiCad official)

  • Symbol: F280039CSPN
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: f280039cspn-etched.step / f280039cspn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); f280039cspn.step / f280039cspn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (285 pp, sha256 4385cb7a74ef5d7f, retrieved 2026-10-03, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF