component
F280039CSPM
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+101@@ -0,0 +1,101 @@+# F280039CSPM++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++F280039CSPM from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GPIO29 | bidirectional | General-purpose I/O 29 (3.3 V VDDIO domain) with default GPIO function; muxed options include SCIA_TX, EPWM7_B, OUTPUTXBAR6, EQEP1_B, LINA_RX and AUXCLKIN. |+| 2 | GPIO28 | bidirectional | General-purpose I/O 28 (3.3 V VDDIO domain) with default GPIO function; muxed options include SCIA_RX, EPWM7_A, OUTPUTXBAR5, EQEP1_A and ERRORSTS. |+| 3 | XRSn | bidirectional | Open-drain device reset input and watchdog reset output with internal pullup; connect a 2.2 kΩ to 10 kΩ resistor between XRSn and VDDIO and a capacitor of 100 nF or less to VSS. |+| 4 | VDD | power_in | 1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V, and VDD must be decoupled per the PMM section. |+| 5 | VSS | power_in | Digital ground; all VSS pins must be connected to the board ground. |+| 6 | A6 | input | ADC-A analog input 6 (also CMPSS-1 comparator input CMP1_HP2/CMP1_LP2 and analog pin AIO228); must stay below VDDA + 0.3 V. |+| 7 | B2,C6 | input | ADC-B analog input 2 and ADC-C analog input 6 (also CMPSS-3 inputs CMP3_HP0/CMP3_LP0 and analog pin AIO226); must stay below VDDA + 0.3 V. |+| 8 | A3,B3,C5,VDAC | input | ADC-A input 3 shared with ADC-B input 3, ADC-C input 5, and optional external reference VDAC for the on-chip DAC; VDAC needs at least a 1 µF capacitor when used as a DAC reference. |+| 9 | A2,B6,C9 | input | ADC-A input 2 shared with ADC-B input 6 and ADC-C input 9 (also CMPSS-1 inputs and analog pin AIO224); must stay below VDDA + 0.3 V. |+| 10 | A15,B9,C7 | input | ADC-A input 15 shared with ADC-B input 9 and ADC-C input 7 (also CMPSS-1 inputs and analog pin AIO233); must stay below VDDA + 0.3 V. |+| 11 | A14,B14,C4 | input | ADC-A input 14 shared with ADC-B input 14 and ADC-C input 4 (also CMPSS-3 inputs and analog pin AIO239); must stay below VDDA + 0.3 V. |+| 12 | A11,B10,C0 | input | ADC-A input 11 shared with ADC-B input 10 and ADC-C input 0 (also CMPSS-1 inputs and analog pin AIO237); must stay below VDDA + 0.3 V. |+| 13 | A5,B12,C2 | input | ADC-A input 5 shared with ADC-B input 12 and ADC-C input 2 (also CMPSS-2/CMPSS-3 inputs); must stay below VDDA + 0.3 V. |+| 14 | A1,B7,DACB_OUT | input | ADC-A input 1 shared with ADC-B input 7; also serves as buffered DAC-B output DACB_OUT and analog pin AIO232; must stay below VDDA + 0.3 V. |+| 15 | A0,B15,C15,DACA_OUT | input | ADC-A input 0 shared with ADC-B input 15 and ADC-C input 15; also serves as buffered DAC-A output DACA_OUT and analog pin AIO231; must stay below VDDA + 0.3 V. |+| 16 | VREFHI | input | ADC high reference voltage; driven externally in external reference mode or generated internally in internal reference mode, with at least a 2.2 µF capacitor between VREFHI and VREFLO placed close to the device. |+| 17 | VREFLO | input | ADC low reference voltage, tied to VSSA. |+| 18 | A12,C1 | input | ADC-A input 12 shared with ADC-C input 1 (also CMPSS-2 and CMPSS-4 inputs and analog pin AIO238/AIO248); must stay below VDDA + 0.3 V. |+| 19 | A7,C3 | input | ADC-A input 7 shared with ADC-C input 3 (also CMPSS-4 inputs and analog pin AIO245); must stay below VDDA + 0.3 V. |+| 20 | A8,B0,C11 | input | ADC-A input 8 shared with ADC-B input 0 and ADC-C input 11 (also CMPSS-4/CMPSS-2 inputs and analog pin AIO241/AIO253); must stay below VDDA + 0.3 V. |+| 21 | VSSA | power_in | Analog ground for the ADC, CMPSS, and DAC blocks. |+| 22 | VDDA | power_in | 3.3 V analog supply; place a minimum 2.2 µF decoupling capacitor on this pin. |+| 23 | A4,B8,C14 | input | ADC-A input 4 shared with ADC-B input 8 and ADC-C input 14 (also CMPSS-2/CMPSS-4 inputs and analog pin AIO225/AIO247); must stay below VDDA + 0.3 V. |+| 24 | A9,B4,C8 | input | ADC-A input 9 shared with ADC-B input 4 and ADC-C input 8 (also CMPSS-2/CMPSS-4 inputs and analog pin AIO227/AIO236); must stay below VDDA + 0.3 V. |+| 25 | A10,B1,C10 | input | ADC-A input 10 shared with ADC-B input 1 and ADC-C input 10 (also CMPSS-2 inputs and analog pin AIO230); must stay below VDDA + 0.3 V. |+| 26 | VSS | power_in | Digital ground; all VSS pins must be connected to the board ground. |+| 27 | VDD | power_in | 1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V. |+| 28 | VDDIO | power_in | 3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum (2.8 V minimum with internal BOR disabled). |+| 29 | GPIO13 | bidirectional | General-purpose I/O 13 with default GPIO function; muxed options include EPWM7_B, MCAN_TX, EQEP1_INDEX, SCIB_RX, PMBUSA_ALERT and SPIA_SOMI. |+| 30 | GPIO12 | bidirectional | General-purpose I/O 12 with default GPIO function; muxed options include EPWM7_A, MCAN_RX, EQEP1_STROBE, SCIB_TX, PMBUSA_CTL and HIC_INT. |+| 31 | GPIO11 | bidirectional | General-purpose I/O 11 with default GPIO function; muxed options include EPWM6_B, SCIB_RX, EQEP1_B, SPIA_STE, LINB_RX and EQEP2_A. |+| 32 | GPIO33 | bidirectional | General-purpose I/O 33 with default GPIO function; muxed options include I2CA_SCL, SPIB_STE, OUTPUTXBAR4, LINA_RX, ADCSOCAO and CANA_RX. |+| 33 | GPIO16 | bidirectional | General-purpose I/O 16 with default GPIO function; muxed options include SPIA_SIMO, OUTPUTXBAR7, EPWM5_A, SCIA_TX, XCLKOUT and SPIB_SOMI. |+| 34 | GPIO17 | bidirectional | General-purpose I/O 17 with default GPIO function; muxed options include SPIA_SOMI, OUTPUTXBAR8, EPWM5_B, SCIA_RX, SD1_C1 and CANA_TX. |+| 35 | GPIO24 | bidirectional | General-purpose I/O 24 with default GPIO function; muxed options include OUTPUTXBAR1, EQEP2_A, EPWM8_A, SPIB_SIMO, ERRORSTS and SCIA_TX. |+| 36 | TCK | input | JTAG test clock with internal pullup enabled. |+| 37 | GPIO37/TDO | tri_state | JTAG test data output (TDO) by default; the pin is tri-stated when JTAG is inactive, so an internal or external pullup is needed to avoid a floating GPIO input. Also GPIO37 with muxed options such as OUTPUTXBAR2, I2CA_SCL and SCIA_TX. |+| 38 | TMS | bidirectional | JTAG test mode select with internal pullup; place an external pullup of about 2.2 kΩ to VDDIO to hold JTAG in reset during normal operation. |+| 39 | GPIO35/TDI | input | JTAG test data input (TDI) by default; enable the internal pullup or add an external pullup to avoid a floating input. Also GPIO35 with muxed options such as SCIA_RX, I2CA_SDA and CANA_RX. |+| 40 | GPIO32 | bidirectional | General-purpose I/O 32 with default GPIO function; muxed options include I2CA_SDA, SPIB_CLK, EPWM8_B, LINA_TX, SD1_D2 and HIC_INT. |+| 41 | GPIO18,X2 | bidirectional | General-purpose I/O 18, or crystal oscillator output X2 when the crystal is used; muxed options include SPIA_CLK, SCIB_TX, CANA_RX and EPWM6_A. |+| 42 | GPIO19,X1 | bidirectional | General-purpose I/O 19, or crystal oscillator/single-ended clock input X1; the initialization software must configure this pin before enabling the crystal oscillator. |+| 43 | VDDIO | power_in | 3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum. |+| 44 | VDD | power_in | 1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V. |+| 45 | VSS | power_in | Digital ground; all VSS pins must be connected to the board ground. |+| 46 | GPIO39 | bidirectional | General-purpose I/O 39 with default GPIO function; muxed options include MCAN_RX, FSIRXA_CLK, EQEP2_INDEX, SYNCOUT, EQEP1_INDEX and HIC_D7. |+| 47 | GPIO8 | bidirectional | General-purpose I/O 8 with default GPIO function; muxed options include EPWM5_A, ADCSOCAO, SCIA_TX, SPIA_SIMO, I2CA_SCL and FSITXA_TDM_CLK. |+| 48 | GPIO4 | bidirectional | General-purpose I/O 4 with default GPIO function; muxed options include EPWM3_A, MCAN_TX, OUTPUTXBAR3, CANA_TX, SPIB_CLK and EQEP2_STROBE. |+| 49 | GPIO3 | bidirectional | General-purpose I/O 3 with default GPIO function; muxed options include EPWM2_B, OUTPUTXBAR2, PMBUSA_SCL, SPIA_CLK, SCIA_RX and CANA_RX. |+| 50 | GPIO2 | bidirectional | General-purpose I/O 2 with default GPIO function; muxed options include EPWM2_A, OUTPUTXBAR1, PMBUSA_SDA, SPIA_SIMO, SCIA_TX and CANA_TX. |+| 51 | GPIO1 | bidirectional | General-purpose I/O 1 with default GPIO function; muxed options include EPWM1_B, I2CA_SCL, SPIA_SOMI, MCAN_TX and HIC_D10. |+| 52 | GPIO0 | bidirectional | General-purpose I/O 0 with default GPIO function; muxed options include EPWM1_A, I2CA_SDA, SPIA_STE, FSIRXA_CLK, MCAN_RX and EQEP1_INDEX. |+| 53 | GPIO40 | bidirectional | General-purpose I/O 40 with default GPIO function; muxed options include SPIB_SIMO, EPWM2_B, PMBUSA_SDA, FSIRXA_D0, SCIB_TX and EQEP1_A. |+| 54 | GPIO23 | bidirectional | General-purpose I/O 23 with default GPIO function; muxed options include EQEP1_INDEX, SCIB_RX, SPIB_STE, SD1_C4, LINA_RX and EPWM4_B. |+| 55 | GPIO41 | bidirectional | General-purpose I/O 41 with default GPIO function; muxed options include EPWM2_A, PMBUSA_SCL, FSIRXA_D1, SCIB_RX, EQEP1_B and SPIB_SOMI. |+| 56 | GPIO22 | bidirectional | General-purpose I/O 22 with default GPIO function; muxed options include EQEP1_STROBE, SCIB_TX, SPIB_CLK, SD1_D4, LINA_TX and EPWM4_A. |+| 57 | GPIO7 | bidirectional | General-purpose I/O 7 with default GPIO function; muxed options include EPWM4_B, OUTPUTXBAR5, EQEP1_B, SPIB_SIMO, FSITXA_CLK and HIC_A6. |+| 58 | VSS | power_in | Digital ground; all VSS pins must be connected to the board ground. |+| 59 | VDD | power_in | 1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V. |+| 60 | VDDIO | power_in | 3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum. |+| 61 | GPIO5 | bidirectional | General-purpose I/O 5 with default GPIO function; muxed options include EPWM3_B, OUTPUTXBAR3, MCAN_RX, CANA_RX, SPIA_STE and FSITXA_D1. |+| 62 | GPIO9 | bidirectional | General-purpose I/O 9 with default GPIO function; muxed options include EPWM5_B, SCIB_TX, OUTPUTXBAR6, EQEP1_INDEX, SCIA_RX and SPIA_CLK. |+| 63 | GPIO10 | bidirectional | General-purpose I/O 10 with default GPIO function; muxed options include EPWM6_A, ADCSOCBO, EQEP1_A, SCIB_TX, SPIA_SOMI and I2CA_SDA. |+| 64 | GPIO6 | bidirectional | General-purpose I/O 6 with default GPIO function; muxed options include EPWM4_A, OUTPUTXBAR4, SYNCOUT, EQEP1_A, SPIB_SOMI and FSITXA_D0. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `F280039CSPM`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `f280039cspm-etched.step` / `f280039cspm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `f280039cspm.step` / `f280039cspm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tms320f280037c-q1) (285 pp, sha256 `4385cb7a74ef5d7f`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/f280039cspm-datasheet.pdf)
page.jsonadded+536@@ -0,0 +1,536 @@+{+ "slug": "f280039cspm",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "f280039cspm",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "f280039cspm.kicad_sym",+ "f280039cspm.kicad_mod",+ "f280039cspm.glb",+ "f280039cspm.step",+ "f280039cspm.lbr",+ "docs/hero.png",+ "docs/f280039cspm-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "f280039cspm-hero.glb",+ "f280039cspm-hero.overlay.json"+ ],+ "component": {+ "mpn": "F280039CSPM",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f280037c-q1",+ "parts": {+ "symbol": "f280039cspm.kicad_sym",+ "footprint": "f280039cspm.kicad_mod",+ "model_3d": "f280039cspm-hero.glb",+ "model_3d_plain": "f280039cspm.glb",+ "model_3d_step": "f280039cspm-etched.step",+ "model_3d_step_plain": "f280039cspm.step",+ "lbr": "f280039cspm.lbr"+ },+ "distributor_links": {+ "lcsc": "C3019563",+ "digikey": "296-F280039CSPM-ND",+ "mouser": "595-F280039CSPM"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:48:15Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-F280039CSPM-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-F280039CSPM",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GPIO29",+ "type": "bidirectional",+ "description": "General-purpose I/O 29 (3.3 V VDDIO domain) with default GPIO function; muxed options include SCIA_TX, EPWM7_B, OUTPUTXBAR6, EQEP1_B, LINA_RX and AUXCLKIN."+ },+ {+ "number": "2",+ "name": "GPIO28",+ "type": "bidirectional",+ "description": "General-purpose I/O 28 (3.3 V VDDIO domain) with default GPIO function; muxed options include SCIA_RX, EPWM7_A, OUTPUTXBAR5, EQEP1_A and ERRORSTS."+ },+ {+ "number": "3",+ "name": "XRSn",+ "type": "bidirectional",+ "description": "Open-drain device reset input and watchdog reset output with internal pullup; connect a 2.2 kΩ to 10 kΩ resistor between XRSn and VDDIO and a capacitor of 100 nF or less to VSS."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V, and VDD must be decoupled per the PMM section."+ },+ {+ "number": "5",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the board ground."+ },+ {+ "number": "6",+ "name": "A6",+ "type": "input",+ "description": "ADC-A analog input 6 (also CMPSS-1 comparator input CMP1_HP2/CMP1_LP2 and analog pin AIO228); must stay below VDDA + 0.3 V."+ },+ {+ "number": "7",+ "name": "B2,C6",+ "type": "input",+ "description": "ADC-B analog input 2 and ADC-C analog input 6 (also CMPSS-3 inputs CMP3_HP0/CMP3_LP0 and analog pin AIO226); must stay below VDDA + 0.3 V."+ },+ {+ "number": "8",+ "name": "A3,B3,C5,VDAC",+ "type": "input",+ "description": "ADC-A input 3 shared with ADC-B input 3, ADC-C input 5, and optional external reference VDAC for the on-chip DAC; VDAC needs at least a 1 µF capacitor when used as a DAC reference."+ },+ {+ "number": "9",+ "name": "A2,B6,C9",+ "type": "input",+ "description": "ADC-A input 2 shared with ADC-B input 6 and ADC-C input 9 (also CMPSS-1 inputs and analog pin AIO224); must stay below VDDA + 0.3 V."+ },+ {+ "number": "10",+ "name": "A15,B9,C7",+ "type": "input",+ "description": "ADC-A input 15 shared with ADC-B input 9 and ADC-C input 7 (also CMPSS-1 inputs and analog pin AIO233); must stay below VDDA + 0.3 V."+ },+ {+ "number": "11",+ "name": "A14,B14,C4",+ "type": "input",+ "description": "ADC-A input 14 shared with ADC-B input 14 and ADC-C input 4 (also CMPSS-3 inputs and analog pin AIO239); must stay below VDDA + 0.3 V."+ },+ {+ "number": "12",+ "name": "A11,B10,C0",+ "type": "input",+ "description": "ADC-A input 11 shared with ADC-B input 10 and ADC-C input 0 (also CMPSS-1 inputs and analog pin AIO237); must stay below VDDA + 0.3 V."+ },+ {+ "number": "13",+ "name": "A5,B12,C2",+ "type": "input",+ "description": "ADC-A input 5 shared with ADC-B input 12 and ADC-C input 2 (also CMPSS-2/CMPSS-3 inputs); must stay below VDDA + 0.3 V."+ },+ {+ "number": "14",+ "name": "A1,B7,DACB_OUT",+ "type": "input",+ "description": "ADC-A input 1 shared with ADC-B input 7; also serves as buffered DAC-B output DACB_OUT and analog pin AIO232; must stay below VDDA + 0.3 V."+ },+ {+ "number": "15",+ "name": "A0,B15,C15,DACA_OUT",+ "type": "input",+ "description": "ADC-A input 0 shared with ADC-B input 15 and ADC-C input 15; also serves as buffered DAC-A output DACA_OUT and analog pin AIO231; must stay below VDDA + 0.3 V."+ },+ {+ "number": "16",+ "name": "VREFHI",+ "type": "input",+ "description": "ADC high reference voltage; driven externally in external reference mode or generated internally in internal reference mode, with at least a 2.2 µF capacitor between VREFHI and VREFLO placed close to the device."+ },+ {+ "number": "17",+ "name": "VREFLO",+ "type": "input",+ "description": "ADC low reference voltage, tied to VSSA."+ },+ {+ "number": "18",+ "name": "A12,C1",+ "type": "input",+ "description": "ADC-A input 12 shared with ADC-C input 1 (also CMPSS-2 and CMPSS-4 inputs and analog pin AIO238/AIO248); must stay below VDDA + 0.3 V."+ },+ {+ "number": "19",+ "name": "A7,C3",+ "type": "input",+ "description": "ADC-A input 7 shared with ADC-C input 3 (also CMPSS-4 inputs and analog pin AIO245); must stay below VDDA + 0.3 V."+ },+ {+ "number": "20",+ "name": "A8,B0,C11",+ "type": "input",+ "description": "ADC-A input 8 shared with ADC-B input 0 and ADC-C input 11 (also CMPSS-4/CMPSS-2 inputs and analog pin AIO241/AIO253); must stay below VDDA + 0.3 V."+ },+ {+ "number": "21",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground for the ADC, CMPSS, and DAC blocks."+ },+ {+ "number": "22",+ "name": "VDDA",+ "type": "power_in",+ "description": "3.3 V analog supply; place a minimum 2.2 µF decoupling capacitor on this pin."+ },+ {+ "number": "23",+ "name": "A4,B8,C14",+ "type": "input",+ "description": "ADC-A input 4 shared with ADC-B input 8 and ADC-C input 14 (also CMPSS-2/CMPSS-4 inputs and analog pin AIO225/AIO247); must stay below VDDA + 0.3 V."+ },+ {+ "number": "24",+ "name": "A9,B4,C8",+ "type": "input",+ "description": "ADC-A input 9 shared with ADC-B input 4 and ADC-C input 8 (also CMPSS-2/CMPSS-4 inputs and analog pin AIO227/AIO236); must stay below VDDA + 0.3 V."+ },+ {+ "number": "25",+ "name": "A10,B1,C10",+ "type": "input",+ "description": "ADC-A input 10 shared with ADC-B input 1 and ADC-C input 10 (also CMPSS-2 inputs and analog pin AIO230); must stay below VDDA + 0.3 V."+ },+ {+ "number": "26",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the board ground."+ },+ {+ "number": "27",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V."+ },+ {+ "number": "28",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum (2.8 V minimum with internal BOR disabled)."+ },+ {+ "number": "29",+ "name": "GPIO13",+ "type": "bidirectional",+ "description": "General-purpose I/O 13 with default GPIO function; muxed options include EPWM7_B, MCAN_TX, EQEP1_INDEX, SCIB_RX, PMBUSA_ALERT and SPIA_SOMI."+ },+ {+ "number": "30",+ "name": "GPIO12",+ "type": "bidirectional",+ "description": "General-purpose I/O 12 with default GPIO function; muxed options include EPWM7_A, MCAN_RX, EQEP1_STROBE, SCIB_TX, PMBUSA_CTL and HIC_INT."+ },+ {+ "number": "31",+ "name": "GPIO11",+ "type": "bidirectional",+ "description": "General-purpose I/O 11 with default GPIO function; muxed options include EPWM6_B, SCIB_RX, EQEP1_B, SPIA_STE, LINB_RX and EQEP2_A."+ },+ {+ "number": "32",+ "name": "GPIO33",+ "type": "bidirectional",+ "description": "General-purpose I/O 33 with default GPIO function; muxed options include I2CA_SCL, SPIB_STE, OUTPUTXBAR4, LINA_RX, ADCSOCAO and CANA_RX."+ },+ {+ "number": "33",+ "name": "GPIO16",+ "type": "bidirectional",+ "description": "General-purpose I/O 16 with default GPIO function; muxed options include SPIA_SIMO, OUTPUTXBAR7, EPWM5_A, SCIA_TX, XCLKOUT and SPIB_SOMI."+ },+ {+ "number": "34",+ "name": "GPIO17",+ "type": "bidirectional",+ "description": "General-purpose I/O 17 with default GPIO function; muxed options include SPIA_SOMI, OUTPUTXBAR8, EPWM5_B, SCIA_RX, SD1_C1 and CANA_TX."+ },+ {+ "number": "35",+ "name": "GPIO24",+ "type": "bidirectional",+ "description": "General-purpose I/O 24 with default GPIO function; muxed options include OUTPUTXBAR1, EQEP2_A, EPWM8_A, SPIB_SIMO, ERRORSTS and SCIA_TX."+ },+ {+ "number": "36",+ "name": "TCK",+ "type": "input",+ "description": "JTAG test clock with internal pullup enabled."+ },+ {+ "number": "37",+ "name": "GPIO37/TDO",+ "type": "tri_state",+ "description": "JTAG test data output (TDO) by default; the pin is tri-stated when JTAG is inactive, so an internal or external pullup is needed to avoid a floating GPIO input. Also GPIO37 with muxed options such as OUTPUTXBAR2, I2CA_SCL and SCIA_TX."+ },+ {+ "number": "38",+ "name": "TMS",+ "type": "bidirectional",+ "description": "JTAG test mode select with internal pullup; place an external pullup of about 2.2 kΩ to VDDIO to hold JTAG in reset during normal operation."+ },+ {+ "number": "39",+ "name": "GPIO35/TDI",+ "type": "input",+ "description": "JTAG test data input (TDI) by default; enable the internal pullup or add an external pullup to avoid a floating input. Also GPIO35 with muxed options such as SCIA_RX, I2CA_SDA and CANA_RX."+ },+ {+ "number": "40",+ "name": "GPIO32",+ "type": "bidirectional",+ "description": "General-purpose I/O 32 with default GPIO function; muxed options include I2CA_SDA, SPIB_CLK, EPWM8_B, LINA_TX, SD1_D2 and HIC_INT."+ },+ {+ "number": "41",+ "name": "GPIO18,X2",+ "type": "bidirectional",+ "description": "General-purpose I/O 18, or crystal oscillator output X2 when the crystal is used; muxed options include SPIA_CLK, SCIB_TX, CANA_RX and EPWM6_A."+ },+ {+ "number": "42",+ "name": "GPIO19,X1",+ "type": "bidirectional",+ "description": "General-purpose I/O 19, or crystal oscillator/single-ended clock input X1; the initialization software must configure this pin before enabling the crystal oscillator."+ },+ {+ "number": "43",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum."+ },+ {+ "number": "44",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V."+ },+ {+ "number": "45",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the board ground."+ },+ {+ "number": "46",+ "name": "GPIO39",+ "type": "bidirectional",+ "description": "General-purpose I/O 39 with default GPIO function; muxed options include MCAN_RX, FSIRXA_CLK, EQEP2_INDEX, SYNCOUT, EQEP1_INDEX and HIC_D7."+ },+ {+ "number": "47",+ "name": "GPIO8",+ "type": "bidirectional",+ "description": "General-purpose I/O 8 with default GPIO function; muxed options include EPWM5_A, ADCSOCAO, SCIA_TX, SPIA_SIMO, I2CA_SCL and FSITXA_TDM_CLK."+ },+ {+ "number": "48",+ "name": "GPIO4",+ "type": "bidirectional",+ "description": "General-purpose I/O 4 with default GPIO function; muxed options include EPWM3_A, MCAN_TX, OUTPUTXBAR3, CANA_TX, SPIB_CLK and EQEP2_STROBE."+ },+ {+ "number": "49",+ "name": "GPIO3",+ "type": "bidirectional",+ "description": "General-purpose I/O 3 with default GPIO function; muxed options include EPWM2_B, OUTPUTXBAR2, PMBUSA_SCL, SPIA_CLK, SCIA_RX and CANA_RX."+ },+ {+ "number": "50",+ "name": "GPIO2",+ "type": "bidirectional",+ "description": "General-purpose I/O 2 with default GPIO function; muxed options include EPWM2_A, OUTPUTXBAR1, PMBUSA_SDA, SPIA_SIMO, SCIA_TX and CANA_TX."+ },+ {+ "number": "51",+ "name": "GPIO1",+ "type": "bidirectional",+ "description": "General-purpose I/O 1 with default GPIO function; muxed options include EPWM1_B, I2CA_SCL, SPIA_SOMI, MCAN_TX and HIC_D10."+ },+ {+ "number": "52",+ "name": "GPIO0",+ "type": "bidirectional",+ "description": "General-purpose I/O 0 with default GPIO function; muxed options include EPWM1_A, I2CA_SDA, SPIA_STE, FSIRXA_CLK, MCAN_RX and EQEP1_INDEX."+ },+ {+ "number": "53",+ "name": "GPIO40",+ "type": "bidirectional",+ "description": "General-purpose I/O 40 with default GPIO function; muxed options include SPIB_SIMO, EPWM2_B, PMBUSA_SDA, FSIRXA_D0, SCIB_TX and EQEP1_A."+ },+ {+ "number": "54",+ "name": "GPIO23",+ "type": "bidirectional",+ "description": "General-purpose I/O 23 with default GPIO function; muxed options include EQEP1_INDEX, SCIB_RX, SPIB_STE, SD1_C4, LINA_RX and EPWM4_B."+ },+ {+ "number": "55",+ "name": "GPIO41",+ "type": "bidirectional",+ "description": "General-purpose I/O 41 with default GPIO function; muxed options include EPWM2_A, PMBUSA_SCL, FSIRXA_D1, SCIB_RX, EQEP1_B and SPIB_SOMI."+ },+ {+ "number": "56",+ "name": "GPIO22",+ "type": "bidirectional",+ "description": "General-purpose I/O 22 with default GPIO function; muxed options include EQEP1_STROBE, SCIB_TX, SPIB_CLK, SD1_D4, LINA_TX and EPWM4_A."+ },+ {+ "number": "57",+ "name": "GPIO7",+ "type": "bidirectional",+ "description": "General-purpose I/O 7 with default GPIO function; muxed options include EPWM4_B, OUTPUTXBAR5, EQEP1_B, SPIB_SIMO, FSITXA_CLK and HIC_A6."+ },+ {+ "number": "58",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground; all VSS pins must be connected to the board ground."+ },+ {+ "number": "59",+ "name": "VDD",+ "type": "power_in",+ "description": "1.2 V digital logic supply pin; recommended supply range is 1.14 V to 1.32 V."+ },+ {+ "number": "60",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3 V digital I/O supply pin; recommended range is 3.3 V nominal, 3.63 V maximum."+ },+ {+ "number": "61",+ "name": "GPIO5",+ "type": "bidirectional",+ "description": "General-purpose I/O 5 with default GPIO function; muxed options include EPWM3_B, OUTPUTXBAR3, MCAN_RX, CANA_RX, SPIA_STE and FSITXA_D1."+ },+ {+ "number": "62",+ "name": "GPIO9",+ "type": "bidirectional",+ "description": "General-purpose I/O 9 with default GPIO function; muxed options include EPWM5_B, SCIB_TX, OUTPUTXBAR6, EQEP1_INDEX, SCIA_RX and SPIA_CLK."+ },+ {+ "number": "63",+ "name": "GPIO10",+ "type": "bidirectional",+ "description": "General-purpose I/O 10 with default GPIO function; muxed options include EPWM6_A, ADCSOCBO, EQEP1_A, SCIB_TX, SPIA_SOMI and I2CA_SDA."+ },+ {+ "number": "64",+ "name": "GPIO6",+ "type": "bidirectional",+ "description": "General-purpose I/O 6 with default GPIO function; muxed options include EPWM4_A, OUTPUTXBAR4, SYNCOUT, EQEP1_A, SPIB_SOMI and FSITXA_D0."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: MPN F280039CSPM is not printed in the supplied text. The datasheet device list uses TMS320F280039C w; Figure 5-3 (64-pin PM, Q temperature) differs from Figure 5-4 (64-pin PM, non-Q) at pin 46: Q varian; Pin 46 = GPIO39 comes from Figure 5-4 only. Table 5-1 and Table 5-3 list GPIO39 without a clear 64-p"+ ],+ "pages_sent": 143,+ "cost_usd": 1.0518,+ "at": "2026-10-08T19:47:43"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tms320f280037c-q1",+ "pages": 285,+ "sha256": "4385cb7a74ef5d7f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "f280039cspm.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "f280039cspm-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "15ec8ad1a454d3cc78f818546f3dba9c6567b428a2e025593c1a9a8a42b9be21",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}