component
F280025CPNSR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownF280025CPNSR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)
F280025CPNSR from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO30 | bidirectional | General-purpose input/output 30, configurable as input or output with internal pull-up option. |
| 2 | GPIO31 | bidirectional | General-purpose input/output 31, configurable as input or output with internal pull-up option. |
| 3 | GPIO29 | bidirectional | General-purpose input/output 29, configurable as input or output with internal pull-up option. |
| 4 | GPIO28 | bidirectional | General-purpose input/output 28, configurable as input or output with internal pull-up option. |
| 5 | XRSn | bidirectional | Device reset (input) and watchdog reset (output); open-drain with internal pull-up; 2.2kΩ to 10kΩ external pull-up to VDDIO recommended. |
| 6 | GPIO46 | bidirectional | General-purpose input/output 46, configurable as input or output with internal pull-up option. |
| 7 | VDDIO | power_in | 3.3V digital I/O power supply pin; requires decoupling capacitor per power management module specification. |
| 8 | VDD | power_in | 1.2V digital logic power supply pin for internal core; requires decoupling capacitor per power management module specification. |
| 9 | VSS | power_in | Digital ground pin; must be connected to board ground. |
| 10 | A6 | input | ADC-A input channel 6 or analog input without ADC multiplexing; maximum voltage VDDA + 0.3V. |
| 11 | C6 | input | ADC-C input channel 6 or analog input; supports CMPSS multiplexing; maximum voltage VDDA + 0.3V. |
| 12 | A3/C5/VDAC | input | ADC-A input 3 or ADC-C input 5 or optional external reference for CMPSS DAC; internal capacitor to VSSA requires ≥1µF external capacitor if used as DAC reference. |
| 13 | A2/C9 | input | ADC-A input 2 or ADC-C input 9; supports CMPSS-1 multiplexing; maximum voltage VDDA + 0.3V. |
| 14 | A15/C7 | input | ADC-A input 15 or ADC-C input 7; supports CMPSS-1 multiplexing; maximum voltage VDDA + 0.3V. |
| 15 | A14/C4 | input | ADC-A input 14 or ADC-C input 4; supports CMPSS-3 multiplexing; maximum voltage VDDA + 0.3V. |
| 16 | A11/C0 | input | ADC-A input 11 or ADC-C input 0; supports CMPSS-1 multiplexing; maximum voltage VDDA + 0.3V. |
| 17 | A5/C2 | input | ADC-A input 5 or ADC-C input 2; supports CMPSS-3 multiplexing; maximum voltage VDDA + 0.3V. |
| 18 | A1 | input | ADC-A input 1 or analog input; supports CMPSS-1 multiplexing; maximum voltage VDDA + 0.3V. |
| 19 | A0/C15 | input | ADC-A input 0 or ADC-C input 15; supports CMPSS-3 multiplexing; maximum voltage VDDA + 0.3V. |
| 20 | VREFHI | input | ADC high reference voltage (2.4V to 3.3V external or 1.65V/2.5V internal); requires ≥2.2µF decoupling capacitor placed close to device; must be ≤VDDA + 0.3V. |
| 21 | VREFLO | input | ADC low reference voltage, typically connected to VSSA (analog ground). |
| 22 | A12/C1 | input | ADC-A input 12 or ADC-C input 1; supports CMPSS-2 and CMPSS-4 multiplexing; maximum voltage VDDA + 0.3V. |
| 23 | A7/C3 | input | ADC-A input 7 or ADC-C input 3; supports CMPSS-4 multiplexing; maximum voltage VDDA + 0.3V. |
| 24 | A8/C11 | input | ADC-A input 8 or ADC-C input 11; supports CMPSS-2 and CMPSS-4 multiplexing; maximum voltage VDDA + 0.3V. |
| 25 | VSSA | power_in | Analog ground pin; must be connected to board ground; internal connection to VSS available. |
| 26 | VDDA | power_in | 3.3V analog power supply pin; requires ≥2.2µF decoupling capacitor per power management module specification. |
| 27 | A4/C14 | input | ADC-A input 4 or ADC-C input 14; supports CMPSS-2 and CMPSS-4 multiplexing; maximum voltage VDDA + 0.3V. |
| 28 | A9/C8 | input | ADC-A input 9 or ADC-C input 8; supports CMPSS-2 and CMPSS-4 multiplexing; maximum voltage VDDA + 0.3V. |
| 29 | A10/C10 | input | ADC-A input 10 or ADC-C input 10; supports CMPSS-2 multiplexing; maximum voltage VDDA + 0.3V. |
| 30 | VSS | power_in | Digital ground pin; must be connected to board ground. |
| 31 | VDD | power_in | 1.2V digital logic power supply pin for internal core; requires decoupling capacitor per power management module specification. |
| 32 | VDDIO | power_in | 3.3V digital I/O power supply pin; requires decoupling capacitor per power management module specification. |
| 33 | FLT2 | unconnected | Flash test pin 2 reserved for TI; must remain unconnected or tie through ≥4.7kΩ resistor to VSS. |
| 34 | FLT1 | unconnected | Flash test pin 1 reserved for TI; must remain unconnected or tie through ≥4.7kΩ resistor to VSS. |
| 35 | GPIO13 | bidirectional | General-purpose input/output 13, configurable as input or output with internal pull-up option. |
| 36 | GPIO12 | bidirectional | General-purpose input/output 12, configurable as input or output with internal pull-up option. |
| 37 | GPIO11 | bidirectional | General-purpose input/output 11, configurable as input or output with internal pull-up option. |
| 38 | GPIO33 | bidirectional | General-purpose input/output 33, configurable as input or output with internal pull-up option. |
| 39 | GPIO16 | bidirectional | General-purpose input/output 16, configurable as input or output with internal pull-up option. |
| 40 | GPIO17 | bidirectional | General-purpose input/output 17, configurable as input or output with internal pull-up option. |
| 41 | GPIO24 | bidirectional | General-purpose input/output 24, configurable as input or output with internal pull-up option. |
| 42 | GPIO25 | bidirectional | General-purpose input/output 25, configurable as input or output with internal pull-up option. |
| 43 | GPIO26 | bidirectional | General-purpose input/output 26, configurable as input or output with internal pull-up option. |
| 44 | GPIO27 | bidirectional | General-purpose input/output 27, configurable as input or output with internal pull-up option. |
| 45 | TCK | input | JTAG test clock with internal pull-up; JTAG timing and protocol per IEEE 1149.1-1990 standard. |
| 46 | GPIO37/TDO | tri_state | General-purpose input/output 37 or JTAG test data output; open-drain with pull-up or tri-state during JTAG inactivity; internal pull-up should be enabled or external pull-up added. |
| 47 | TMS | bidirectional | JTAG test mode select with internal pull-up; external 2.2kΩ pull-up to VDDIO recommended for normal operation; sampled on TCK rising edge. |
| 48 | GPIO35/TDI | input | General-purpose input/output 35 or JTAG test data input; default multiplex selection is TDI with internal pull-up disabled by default; internal or external pull-up recommended to avoid floating input. |
| 49 | GPIO32 | bidirectional | General-purpose input/output 32, configurable as input or output with internal pull-up option. |
| 50 | GPIO18_X2 | bidirectional | General-purpose input/output 18 or X2 crystal output; can be used as GPIO when crystal oscillator is disabled or single-ended clock mode is used. |
| 51 | GPIO19_X1 | bidirectional | General-purpose input/output 19 or X1 crystal/clock input; accepts external crystal or single-ended 3.3V clock; can be used as GPIO when crystal oscillator is disabled. |
| 52 | VDDIO | power_in | 3.3V digital I/O power supply pin; requires decoupling capacitor per power management module specification. |
| 53 | VDD | power_in | 1.2V digital logic power supply pin for internal core; requires decoupling capacitor per power management module specification. |
| 54 | GPIO43 | bidirectional | General-purpose input/output 43, configurable as input or output with internal pull-up option. |
| 55 | VSS | power_in | Digital ground pin; must be connected to board ground. |
| 56 | GPIO39 | bidirectional | General-purpose input/output 39, configurable as input or output with internal pull-up option. |
| 57 | GPIO42 | bidirectional | General-purpose input/output 42, configurable as input or output with internal pull-up option. |
| 58 | GPIO8 | bidirectional | General-purpose input/output 8, configurable as input or output with internal pull-up option. |
| 59 | GPIO4 | bidirectional | General-purpose input/output 4, configurable as input or output with internal pull-up option. |
| 60 | GPIO3 | bidirectional | General-purpose input/output 3, configurable as input or output with internal pull-up option. |
| 61 | GPIO2 | bidirectional | General-purpose input/output 2, configurable as input or output with internal pull-up option. |
| 62 | GPIO1 | bidirectional | General-purpose input/output 1, configurable as input or output with internal pull-up option. |
| 63 | GPIO0 | bidirectional | General-purpose input/output 0, configurable as input or output with internal pull-up option. |
| 64 | GPIO40 | bidirectional | General-purpose input/output 40, configurable as input or output with internal pull-up option. |
| 65 | GPIO23 | bidirectional | General-purpose input/output 23, configurable as input or output with internal pull-up option. |
| 66 | GPIO41 | bidirectional | General-purpose input/output 41, configurable as input or output with internal pull-up option. |
| 67 | GPIO22 | bidirectional | General-purpose input/output 22, configurable as input or output with internal pull-up option. |
| 68 | GPIO7 | bidirectional | General-purpose input/output 7, configurable as input or output with internal pull-up option. |
| 69 | GPIO44 | bidirectional | General-purpose input/output 44, configurable as input or output with internal pull-up option. |
| 70 | VSS | power_in | Digital ground pin; must be connected to board ground. |
| 71 | VDD | power_in | 1.2V digital logic power supply pin for internal core; requires decoupling capacitor per power management module specification. |
| 72 | VDDIO | power_in | 3.3V digital I/O power supply pin; requires decoupling capacitor per power management module specification. |
| 73 | GPIO45 | bidirectional | General-purpose input/output 45, configurable as input or output with internal pull-up option. |
| 74 | GPIO5 | bidirectional | General-purpose input/output 5, configurable as input or output with internal pull-up option. |
| 75 | GPIO9 | bidirectional | General-purpose input/output 9, configurable as input or output with internal pull-up option. |
| 76 | GPIO10 | bidirectional | General-purpose input/output 10, configurable as input or output with internal pull-up option. |
| 77 | GPIO34 | bidirectional | General-purpose input/output 34, configurable as input or output with internal pull-up option. |
| 78 | GPIO15 | bidirectional | General-purpose input/output 15, configurable as input or output with internal pull-up option. |
| 79 | GPIO14 | bidirectional | General-purpose input/output 14, configurable as input or output with internal pull-up option. |
| 80 | GPIO6 | bidirectional | General-purpose input/output 6, configurable as input or output with internal pull-up option. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-80(12x12) |
| Category | Embedded Processors & Controllers |
| Pins | 80 |
CAD (KiCad official)
- Symbol:
F280025CPNSR - Footprint:
Package_QFP:LQFP-80_12x12mm_P0.5mm - 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
- 3D model files:
f280025cpnsr-etched.step/f280025cpnsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);f280025cpnsr.step/f280025cpnsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (245 pp, sha256
0723d8e3e09e1f8b, retrieved 2026-09-30, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).