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F280023PTQR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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F280023PTQR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

F280023PTQR from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPIO29 bidirectional General-purpose multiplexed digital I/O pin GPIO29, one of the device's independently programmable GPIO pins.
2 GPIO28 bidirectional General-purpose multiplexed digital I/O pin GPIO28, one of the device's independently programmable GPIO pins.
3 XRSn bidirectional External reset pin, active low; serves as a reset input and also as an open-drain output indicating an internal reset condition.
4 A6,C6 input Analog input pin providing ADC-A input channel 6 and ADC-C input channel 6, following the ADC-x input naming pattern given for other A/C pins in the pin attributes table.
5 A3,C5,VDAC input Analog pin providing ADC-A input channel 3, ADC-C input channel 5, and the internal reference DAC (VDAC) node.
6 A2,C9 input Analog input pin providing ADC-A input channel 2 and ADC-C input channel 9.
7 A15,C7 input Analog input pin providing ADC-A input channel 15 and ADC-C input channel 7.
8 A11,C0 input Analog input pin providing ADC-A input 11 and ADC-C input 0; also multiplexed with CMPSS-1 comparator inputs CMP1_HP1/CMP1_HN1/CMP1_LP1/CMP1_LN1, digital input AIO237, and HIC address bit HIC_A6.
9 A5,C2 input Analog input pin providing ADC-A input channel 5 and ADC-C input channel 2.
10 A1 input Analog input pin (ADC-A input 1); also multiplexed with CMPSS-1 comparator inputs CMP1_HP4/CMP1_LP4, digital input AIO232, and HIC_BASESEL0.
11 A0,C15 input Analog input pin providing ADC-A input 0 and ADC-C input 15; also multiplexed with CMPSS-3 comparator inputs CMP3_HP2/CMP3_LP2, digital input AIO231, and HIC_BASESEL1.
12 VREFHI passive ADC reference-high pin that sets the upper reference voltage for the on-chip 12-bit ADCs.
13 VREFLO passive ADC reference-low pin that sets the lower (near-ground) reference voltage for the on-chip 12-bit ADCs.
14 A12,C1 input Analog input pin providing ADC-A input 12 and ADC-C input 1; also multiplexed with CMPSS-2/CMPSS-4 comparator inputs CMP2_HP1/CMP4_HP2/CMP2_HN1/CMP2_LP1/CMP4_LP2/CMP2_LN1, digital input AIO238, and HIC chip-select HIC_NCS.
15 A7,C3 input Analog input pin providing ADC-A input channel 7 and ADC-C input channel 3.
16 A8,C11 input Analog input pin providing ADC-A input channel 8 and ADC-C input channel 11.
17 VSSA power_in Analog ground pin, return for the analog supply of the ADC and analog peripherals.
18 VDDA power_in Analog supply pin for the ADC and analog peripherals, part of the device's single 3.3V supply.
19 A4,C14 input Analog input pin providing ADC-A input channel 4 and ADC-C input channel 14.
20 A9,C8 input Analog input pin providing ADC-A input channel 9 and ADC-C input channel 8.
21 A10,C10 input Analog input pin providing ADC-A input 10 and ADC-C input 10; also multiplexed with CMPSS-2 comparator inputs CMP2_HP3/CMP2_HN0/CMP2_LP3/CMP2_LN0, digital input AIO230, and HIC_BASESEL2.
22 VSS power_in Digital ground pin.
23 GPIO13 bidirectional General-purpose multiplexed digital I/O pin GPIO13.
24 GPIO12 bidirectional General-purpose multiplexed digital I/O pin GPIO12.
25 GPIO33 bidirectional General-purpose multiplexed digital I/O pin GPIO33.
26 GPIO16 bidirectional General-purpose multiplexed digital I/O pin GPIO16.
27 GPIO24 bidirectional General-purpose multiplexed digital I/O pin GPIO24.
28 TCK input JTAG test clock input, part of the IEEE 1149.1 standard test access port.
29 GPIO37/TDO bidirectional Multiplexed pin: general-purpose I/O GPIO37 or JTAG test data output (TDO).
30 TMS input JTAG test mode select input, part of the IEEE 1149.1 standard test access port.
31 GPIO35/TDI bidirectional Multiplexed pin: general-purpose I/O GPIO35 or JTAG test data input (TDI).
32 GPIO32 bidirectional General-purpose multiplexed digital I/O pin GPIO32.
33 GPIO18_X2 bidirectional Multiplexed pin: general-purpose I/O GPIO18 or crystal oscillator output (X2).
34 GPIO19_X1 bidirectional Multiplexed pin: general-purpose I/O GPIO19 or crystal oscillator input (X1).
35 VDDIO power_in Digital I/O supply pin that powers the GPIO buffers.
36 VDD power_in Digital core logic supply pin, part of the device's single 3.3V supply with internal VREG generation.
37 VSS power_in Digital ground pin.
38 GPIO4 bidirectional General-purpose multiplexed digital I/O pin GPIO4.
39 GPIO3 bidirectional General-purpose multiplexed digital I/O pin GPIO3.
40 GPIO2 bidirectional General-purpose multiplexed digital I/O pin GPIO2.
41 GPIO1 bidirectional General-purpose multiplexed digital I/O pin GPIO1.
42 GPIO0 bidirectional General-purpose multiplexed digital I/O pin GPIO0.
43 GPIO7 bidirectional General-purpose multiplexed digital I/O pin GPIO7.
44 VSS power_in Digital ground pin.
45 VDD power_in Digital core logic supply pin, part of the device's single 3.3V supply.
46 VDDIO power_in Digital I/O supply pin that powers the GPIO buffers.
47 GPIO5 bidirectional General-purpose multiplexed digital I/O pin GPIO5.
48 GPIO6 bidirectional General-purpose multiplexed digital I/O pin GPIO6.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: F280023PTQR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: f280023ptqr-etched.step / f280023ptqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); f280023ptqr.step / f280023ptqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (245 pp, sha256 0723d8e3e09e1f8b, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF