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F2800154QPNRQ1

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TEXAS INSTRUMENTS Global Sourcing Parts, LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentglobal sourcing partsf2800154qpnrq1factory-2.0.0extractor-text
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F2800154QPNRQ1

TEXAS INSTRUMENTS · Global Sourcing Parts · LQFP-80(12x12)

F2800154QPNRQ1 from TEXAS INSTRUMENTS, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPIO30 bidirectional General-purpose input/output 30 with digital mux functions (OUTPUTXBAR7, SYNCOUT-capable mux per Table 5-3).
2 GPIO31 bidirectional General-purpose input/output 31 with digital mux functions.
3 GPIO29 bidirectional General-purpose input/output 29 with digital mux functions.
4 A16/C16,GPIO28 bidirectional ADC-A input 16 / ADC-C input 16 shared with GPIO28 (AGPIO with full digital input and output).
5 XRSn bidirectional Device reset pin with internal pullup that is always active.
6 GPIO46 bidirectional General-purpose input/output 46 with digital mux functions (LINA_TX, MCAN_TX, PMBUSA_SDA).
7 VDDIO power_in 3.3-V digital I/O power pin.
8 VDD power_in 1.2-V digital logic power pin; must not be used to bias external circuits.
9 VSS power_in Digital ground; must be connected to board ground.
10 A6,GPIO228 bidirectional ADC-A input 6 shared with GPIO228 (AGPIO with full digital input and output).
11 C6,GPIO226 bidirectional ADC-C input 6 shared with GPIO226 (AGPIO with full digital input and output).
12 A3/C5,GPIO242 bidirectional ADC-A input 3 / ADC-C input 5 with CMPSS-3 inputs, shared with GPIO242 (AGPIO).
13 A2/C9,GPIO224 bidirectional ADC-A input 2 / ADC-C input 9 with CMPSS-1 inputs, shared with GPIO224 (AGPIO).
14 A15/C7 input ADC-A input 15 / ADC-C input 7 with CMPSS-1 inputs, also digital input AIO233.
15 C4/A14 input ADC-C input 4 / ADC-A input 14 with CMPSS-3 inputs, also digital input AIO239.
16 A11/C0 input ADC-A input 11 / ADC-C input 0 with CMPSS-1 inputs, also digital input AIO237.
17 A5/C2 input ADC-A input 5 / ADC-C input 2 with CMPSS-3 inputs, also digital input AIO244.
18 A1 input ADC-A input 1 with CMPSS-1 inputs, also digital input AIO232.
19 A0/C15/CMP1_DACL input ADC-A input 0 / ADC-C input 15 / CMPSS-1 low DAC output, also digital input AIO231.
20 VREFHI input ADC high reference voltage input; tie to VDDA if the ADC is unused.
21 VREFLO input ADC low reference voltage input; tie to VSSA if unused.
22 A12/C1 input ADC-A input 12 / ADC-C input 1 with CMPSS-2/4 inputs, also digital input AIO238.
23 A7/C3 input ADC-A input 7 / ADC-C input 3 with CMPSS-4 inputs, also digital input AIO245.
24 A8/C11 input ADC-A input 8 / ADC-C input 11 with CMPSS-2/4 inputs, also digital input AIO241.
25 VSSA power_in Analog ground; tie to VSS if no separate analog ground is used.
26 VDDA power_in 3.3-V analog power pin needing a minimum 2.2-uF decoupling capacitor; tie to VDDIO if no dedicated analog supply.
27 A4/C14 input ADC-A input 4 / ADC-C input 14 with CMPSS-2/4 inputs, also digital input AIO225.
28 C8/A9,GPIO227 bidirectional ADC-C input 8 / ADC-A input 9 shared with GPIO227 (AGPIO).
29 A10/C10,GPIO230 bidirectional ADC-A input 10 / ADC-C input 10 with CMPSS-2 inputs, shared with GPIO230 (AGPIO).
30 VSS power_in Digital ground; must be connected to board ground.
31 GPIO48 bidirectional General-purpose input/output 48 with digital mux functions (CANA_TX, MCAN_TX, SCIA_TX, PMBUSA_SDA).
32 GPIO49 bidirectional General-purpose input/output 49 with digital mux functions (CANA_RX, MCAN_RX, SCIA_RX, LINA_RX).
33 A17/C17,GPIO20 bidirectional ADC-A input 17 / ADC-C input 17 shared with GPIO20 (AGPIO).
34 A18/C18,GPIO21 bidirectional ADC-A input 18 / ADC-C input 18 shared with GPIO21 (AGPIO).
35 A19/C19,GPIO13 bidirectional ADC-A input 19 / ADC-C input 19 shared with GPIO13 (AGPIO).
36 A20/C20,GPIO12 bidirectional ADC-A input 20 / ADC-C input 20 shared with GPIO12 (AGPIO).
37 GPIO11 bidirectional General-purpose input/output 11 with digital mux functions (EPWM6_B, CANA_RX, SCIB_RX, SPIA_STE).
38 GPIO33 bidirectional General-purpose input/output 33 with digital mux functions.
39 GPIO16 bidirectional General-purpose input/output 16 with digital mux functions (SPIA_SIMO, XCLKOUT, PMBUSA_SCL).
40 GPIO17 bidirectional General-purpose input/output 17 with digital mux functions (SPIA_SOMI, SCIA_RX, CANA_TX).
41 GPIO24 bidirectional General-purpose input/output 24 with OUTPUTXBAR1 and ERRORSTS (requires external pulldown) mux options.
42 GPIO25 bidirectional General-purpose input/output 25 with OUTPUTXBAR2, EQEP2_B and SCIA_RX mux options.
43 GPIO26 bidirectional General-purpose input/output 26 with OUTPUTXBAR3 and EQEP2_INDEX mux options.
44 GPIO27 bidirectional General-purpose input/output 27 with OUTPUTXBAR4 and EQEP2_STROBE mux options.
45 TCK input JTAG test clock with always-active internal pullup.
46 GPIO37/TDO bidirectional GPIO37 with JTAG TDO as default mux; tri-stated without JTAG activity, so enable the internal pullup or add an external pullup.
47 TMS input JTAG test mode select with always-active internal pullup.
48 GPIO35/TDI bidirectional GPIO35 with JTAG TDI as default mux; enable internal pullup or add an external pullup to avoid a floating input.
49 GPIO32 bidirectional General-purpose input/output 32 with digital mux functions.
50 GPIO18,X2 bidirectional GPIO18 or crystal oscillator output X2.
51 GPIO19,X1 bidirectional GPIO19 or crystal oscillator input X1 / single-ended 3.3-V clock input (also ExtR).
52 VDDIO power_in 3.3-V digital I/O power pin.
53 VDD power_in 1.2-V digital logic power pin; must not be used to bias external circuits.
54 GPIO43 bidirectional General-purpose input/output 43 with OUTPUTXBAR6, PMBUSA_ALERT, I2CA_SCL mux options.
55 VSS power_in Digital ground; must be connected to board ground.
56 VREGENZ input Internal VREG enable with internal pulldown; tie low to VSS to enable the internal VREG or high to VDDIO to use an external supply.
57 GPIO42 bidirectional General-purpose input/output 42 with LINA_RX, OUTPUTXBAR5, I2CA_SDA mux options; located near the PMM so keep free of negative noise.
58 GPIO8 bidirectional General-purpose input/output 8 with EPWM5_A, SCIA_TX, SPIA_SIMO, I2CA_SCL mux options; located near the PMM.
59 GPIO4 bidirectional General-purpose input/output 4; located near the PMM so keep free of negative noise.
60 GPIO3 bidirectional General-purpose input/output 3; located near the PMM so keep free of negative noise.
61 GPIO2 bidirectional General-purpose input/output 2; located near the PMM so keep free of negative noise.
62 GPIO1 bidirectional General-purpose input/output 1; located near the PMM so keep free of negative noise.
63 GPIO0 bidirectional General-purpose input/output 0; located near the PMM so keep free of negative noise.
64 GPIO40 bidirectional General-purpose input/output 40 with EPWM2_B, PMBUSA_SDA, SCIB_TX, EQEP1_A mux options.
65 GPIO23 bidirectional General-purpose input/output 23 with EQEP1_INDEX, SCIB_RX, LINA_RX, EPWM4_B mux options.
66 GPIO41 bidirectional General-purpose input/output 41 with EPWM7_A, EPWM2_A, PMBUSA_SCL, SCIB_RX, EQEP1_B mux options.
67 GPIO22 bidirectional General-purpose input/output 22 with EQEP1_STROBE, SCIB_TX, LINA_TX, EPWM4_A mux options.
68 GPIO7 bidirectional General-purpose input/output 7 with digital mux functions.
69 GPIO44 bidirectional General-purpose input/output 44 with OUTPUTXBAR7, EQEP1_A, PMBUSA_SDA, PMBUSA_CTL mux options.
70 VSS power_in Digital ground; must be connected to board ground.
71 VDD power_in 1.2-V digital logic power pin; must not be used to bias external circuits.
72 VDDIO power_in 3.3-V digital I/O power pin.
73 GPIO45 bidirectional General-purpose input/output 45 with OUTPUTXBAR8 and PMBUSA_ALERT mux options.
74 GPIO5 bidirectional General-purpose input/output 5 with digital mux functions.
75 GPIO9 bidirectional General-purpose input/output 9 with EPWM5_B, SCIB_TX, OUTPUTXBAR6, SPIA_CLK mux options.
76 GPIO10 bidirectional General-purpose input/output 10 with EPWM6_A, ADCSOCBO, SPIA_SOMI, I2CA_SDA mux options.
77 GPIO34 bidirectional General-purpose input/output 34 with digital mux functions.
78 GPIO15 bidirectional General-purpose input/output 15 with SCIB_RX, I2CB_SCL, OUTPUTXBAR4, PMBUSA_SCL mux options.
79 GPIO14 bidirectional General-purpose input/output 14 with SCIB_TX, I2CB_SDA, OUTPUTXBAR3, PMBUSA_SDA mux options.
80 GPIO6 bidirectional General-purpose input/output 6 with digital mux functions (SYNCOUT-capable).

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package LQFP-80(12x12)
Category Global Sourcing Parts
Pins 80

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD with respect to VSS VDD -0.3 1.5 V 47
VDDIO with respect to VSS VDDIO -0.3 4.6 V 47
VDDA with respect to VSSA VDDA -0.3 4.6 V 47
Input voltage VIN -0.3 4.6 V VIN (3.3 V) 47
Output voltage VO -0.3 4.6 V 47
Input clamp current per pin IIK -20 20 mA VIN < VSS/VSSA, VIN > VDDIO/VDDA 47
Input clamp current total for all pins IIKTOTAL -20 20 mA VIN < VSS/VSSA, VIN > VDDIO/VDDA 47
Digital output current per pin IOUT -20 20 mA 47
Operating junction temperature TJ -40 155 °C 47
Storage temperature Tstg -65 150 °C 47
ESD HBM, all pins (automotive, 80-pin PN) V(ESD) -2000 2000 V AEC Q100-002 48
ESD CDM, all pins (automotive, 80-pin PN) V(ESD) -500 500 V AEC Q100-011 48
ESD CDM, corner pins (80-pin PN) V(ESD) -750 750 V Corner pins 1, 20, 21, 40, 41, 60, 61, 80 48
Device supply voltage VDDIO and VDDA, BOR disabled VDDIO, VDDA 2.8 3.3 3.63 V Internal BOR disabled 48
Device supply voltage VDDIO and VDDA, BOR enabled VDDIO, VDDA 3.3 3.63 V Internal BOR enabled 48
Device supply voltage VDD VDD 1.14 1.2 1.32 V 48
Junction temperature TJ -40 140 °C F280015xS, F280015xQ parts 48
Free-air temperature TA -40 125 °C F280015xS, F280015xQ parts 48
Low-level output voltage VOL 0.4 V IOL = IOL MAX 59
Low-level output voltage VOL 0.2 V IOL = 100 µA 59
High-level input voltage VIH 2 V 59
Low-level input voltage VIL 0.8 V 59
High-level output impedance ROH 50 65 96 Ω VOH=VDDS-0.4V 59
Low-level output impedance ROL 48 60 84 Ω VOL=0.4V 59
Weak pulldown resistance RPULLDOWN 22.66 31.49 61.55 kΩ 59
Weak pullup resistance RPULLUP 19.89 29.45 53.63 kΩ 59
Internal voltage regulator output VVREG 1.152 1.2 1.248 V 71
VDDIO BOR voltage on ramp down after XRSn release VBOR-VDDIO-DOWN 2.81 3 V After XRSn Release 71
Supply ramp rate of 3.3V rails SRVDD33 20 100 mV/us VDDIO, VDDA 71
Frequency, device (system) clock f(SYSCLK) 2 120 MHz 80
Flash erase/program VDDIO current IDDIO 65 90 mA VREG enabled, flash continuous program/erase 50
Flash erase/program VDDA current IDDA 0.1 2.6 mA VREG enabled, during Erase/Program cycle 50
Junction-to-case thermal resistance, top (PN) RΘJC 17.7 °C/W PN package 60
Junction-to-board thermal resistance (PN) RΘJB 36.5 °C/W PN package 60
Junction-to-free air thermal resistance (PN) RΘJA 56.7 °C/W High k PCB, PN package 60
Junction-to-package top (PN) Psi JT 0.8 °C/W PN package 60
Junction-to-board (PN) Psi JB 36 °C/W PN package 60

CAD (KiCad official)

  • Symbol: F2800154QPNRQ1
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: f2800154qpnrq1-etched.step / f2800154qpnrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); f2800154qpnrq1.step / f2800154qpnrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (252 pp, sha256 e5e9c14e326ac962, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF