component
F2800137PMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownF2800137PMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
F2800137PMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO29 | bidirectional | General-purpose digital I/O GPIO29, individually programmable and mux-selectable as shown on the 64-pin PM pinout diagram (Figure 5-1). |
| 2 | A16/C16,GPIO28 | bidirectional | Shared pin providing ADC input channel A16, comparator input C16, and digital I/O GPIO28 as printed on the pinout diagram. |
| 3 | XRSn | bidirectional | External reset pin, active low; bidirectional pin that can be driven externally to reset the device and is driven low by the device during an internal reset. |
| 4 | VDD | power_in | Digital core logic supply voltage input. |
| 5 | VSS | power_in | Digital ground reference. |
| 6 | A6,GPIO228 | bidirectional | Shared pin providing ADC input channel A6 and multiplexed digital I/O GPIO228 (AGPIO) as printed on the pinout diagram. |
| 7 | C6,GPIO226 | bidirectional | Shared pin providing comparator input channel C6 and multiplexed digital I/O GPIO226 (AGPIO) as printed on the pinout diagram. |
| 8 | A3/C5,GPIO242 | bidirectional | Shared pin providing ADC input channel A3, comparator input C5, and multiplexed digital I/O GPIO242 (AGPIO) as printed on the pinout diagram. |
| 9 | A2/C9,GPIO224 | bidirectional | Shared pin providing ADC input channel A2, comparator input C9, and multiplexed digital I/O GPIO224 (AGPIO) as printed on the pinout diagram. |
| 10 | A15/C7 | input | Analog-only pin providing ADC input channel A15 and comparator input C7 as printed on the pinout diagram. |
| 11 | C4/A14 | input | Analog-only pin providing comparator input channel C4 and ADC input channel A14 as printed on the pinout diagram. |
| 12 | A11/C0 | input | Analog-only pin providing ADC input channel A11 and comparator input C0 as printed on the pinout diagram. |
| 13 | A5/C2 | input | Analog-only pin providing ADC input channel A5 and comparator input C2 as printed on the pinout diagram. |
| 14 | A1 | input | Analog-only ADC input channel A1 as printed on the pinout diagram. |
| 15 | A0/C15/CMP1_DACL | bidirectional | Shared analog pin providing ADC input channel A0, comparator input C15, and the CMPSS1 internal DAC low-side output/reference (CMP1_DACL) as printed on the pinout diagram. |
| 16 | VREFHI | power_in | ADC high reference voltage input. |
| 17 | VREFLO | power_in | ADC low reference voltage input. |
| 18 | A12/C1 | input | Analog-only pin providing ADC input channel A12 and comparator input C1 as printed on the pinout diagram. |
| 19 | A7/C3 | input | Analog-only pin providing ADC input channel A7 and comparator input C3 as printed on the pinout diagram. |
| 20 | A8/C11 | input | Analog-only pin providing ADC input channel A8 and comparator input C11 as printed on the pinout diagram. |
| 21 | VSSA | power_in | Analog ground reference for the ADC and analog circuits. |
| 22 | VDDA | power_in | Analog supply voltage input for the ADC and analog circuits. |
| 23 | A4/C14 | input | Analog-only pin providing ADC input channel A4 and comparator input C14 as printed on the pinout diagram. |
| 24 | C8/A9,GPIO227 | bidirectional | Shared pin providing comparator input channel C8, ADC input channel A9, and multiplexed digital I/O GPIO227 (AGPIO) as printed on the pinout diagram. |
| 25 | A10/C10,GPIO230 | bidirectional | Shared pin providing ADC input channel A10, comparator input C10, and multiplexed digital I/O GPIO230 (AGPIO) as printed on the pinout diagram. |
| 26 | VSS | power_in | Digital ground reference. |
| 27 | A17/C17,GPIO20 | bidirectional | Shared pin providing ADC input channel A17, comparator input C17, and digital I/O GPIO20 as printed on the pinout diagram. |
| 28 | A18/C18,GPIO21 | bidirectional | Shared pin providing ADC input channel A18, comparator input C18, and digital I/O GPIO21 as printed on the pinout diagram. |
| 29 | A19/C19,GPIO13 | bidirectional | Shared pin providing ADC input channel A19, comparator input C19, and digital I/O GPIO13 as printed on the pinout diagram. |
| 30 | A20/C20,GPIO12 | bidirectional | Shared pin providing ADC input channel A20, comparator input C20, and digital I/O GPIO12 as printed on the pinout diagram. |
| 31 | GPIO11 | bidirectional | General-purpose digital I/O GPIO11, individually programmable and mux-selectable as shown on the pinout diagram. |
| 32 | GPIO33 | bidirectional | General-purpose digital I/O GPIO33, individually programmable and mux-selectable as shown on the pinout diagram. |
| 33 | GPIO16 | bidirectional | General-purpose digital I/O GPIO16, individually programmable and mux-selectable as shown on the pinout diagram. |
| 34 | GPIO17 | bidirectional | General-purpose digital I/O GPIO17, individually programmable and mux-selectable as shown on the pinout diagram. |
| 35 | GPIO24 | bidirectional | General-purpose digital I/O GPIO24, individually programmable and mux-selectable as shown on the pinout diagram. |
| 36 | TCK | input | JTAG test clock input. |
| 37 | GPIO37/TDO | bidirectional | Shared pin providing JTAG test data output (TDO) and general-purpose digital I/O GPIO37 as printed on the pinout diagram. |
| 38 | TMS | input | JTAG test mode select input. |
| 39 | GPIO35/TDI | bidirectional | Shared pin providing JTAG test data input (TDI) and general-purpose digital I/O GPIO35 as printed on the pinout diagram. |
| 40 | GPIO32 | bidirectional | General-purpose digital I/O GPIO32, individually programmable and mux-selectable as shown on the pinout diagram. |
| 41 | GPIO18,X2 | bidirectional | Shared pin providing general-purpose digital I/O GPIO18 and the crystal oscillator X2 connection as printed on the pinout diagram. |
| 42 | GPIO19,X1 | bidirectional | Shared pin providing general-purpose digital I/O GPIO19 and the crystal oscillator X1 connection as printed on the pinout diagram. |
| 43 | VDDIO | power_in | I/O supply voltage input. |
| 44 | VDD | power_in | Digital core logic supply voltage input. |
| 45 | VSS | power_in | Digital ground reference. |
| 46 | GPIO39 | bidirectional | General-purpose digital I/O GPIO39, individually programmable and mux-selectable as shown on the pinout diagram (this PMR order variant does not use the VREGENZ option shown for the alternate PM pinout in Figure 5-2). |
| 47 | GPIO8 | bidirectional | General-purpose digital I/O GPIO8, individually programmable and mux-selectable as shown on the pinout diagram. |
| 48 | GPIO4 | bidirectional | General-purpose digital I/O GPIO4, individually programmable and mux-selectable as shown on the pinout diagram. |
| 49 | GPIO3 | bidirectional | General-purpose digital I/O GPIO3, individually programmable and mux-selectable as shown on the pinout diagram. |
| 50 | GPIO2 | bidirectional | General-purpose digital I/O GPIO2, individually programmable and mux-selectable as shown on the pinout diagram. |
| 51 | GPIO1 | bidirectional | General-purpose digital I/O GPIO1, individually programmable and mux-selectable as shown on the pinout diagram. |
| 52 | GPIO0 | bidirectional | General-purpose digital I/O GPIO0, individually programmable and mux-selectable as shown on the pinout diagram. |
| 53 | GPIO40 | bidirectional | General-purpose digital I/O GPIO40, individually programmable and mux-selectable as shown on the pinout diagram. |
| 54 | GPIO23 | bidirectional | General-purpose digital I/O GPIO23, individually programmable and mux-selectable as shown on the pinout diagram. |
| 55 | GPIO41 | bidirectional | General-purpose digital I/O GPIO41, individually programmable and mux-selectable as shown on the pinout diagram. |
| 56 | GPIO22 | bidirectional | General-purpose digital I/O GPIO22, individually programmable and mux-selectable as shown on the pinout diagram. |
| 57 | GPIO7 | bidirectional | General-purpose digital I/O GPIO7, individually programmable and mux-selectable as shown on the pinout diagram. |
| 58 | VSS | power_in | Digital ground reference. |
| 59 | VDD | power_in | Digital core logic supply voltage input. |
| 60 | VDDIO | power_in | I/O supply voltage input. |
| 61 | GPIO5 | bidirectional | General-purpose digital I/O GPIO5, individually programmable and mux-selectable as shown on the pinout diagram. |
| 62 | GPIO9 | bidirectional | General-purpose digital I/O GPIO9, individually programmable and mux-selectable as shown on the pinout diagram. |
| 63 | GPIO10 | bidirectional | General-purpose digital I/O GPIO10, individually programmable and mux-selectable as shown on the pinout diagram. |
| 64 | GPIO6 | bidirectional | General-purpose digital I/O GPIO6, individually programmable and mux-selectable as shown on the pinout diagram. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
F2800137PMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
f2800137pmr-etched.step/f2800137pmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);f2800137pmr.step/f2800137pmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (205 pp, sha256
022482ea5c58e9d0, retrieved 2026-09-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(text+vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).