component
EZJZ1V80010
Public Made by Adomby adom
PANASONIC Varistors, 0603. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| ezjz1v80010-etched.step | 17d ago |
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| ezjz1v80010.lbr | 17d ago |
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EZJZ1V80010
PANASONIC · Varistors · 0603
EZJZ1V80010 from PANASONIC, in a 0603. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bipolar (non-polarized) terminal electrode L1 of the 0603 multilayer varistor; the part is symmetric, so terminals are interchangeable, and it has 80 V nominal varistor voltage at 1 mA, 10 V max allowable DC and 1 pF max capacitance at 1 MHz. |
| 2 | 2 | passive | Bipolar (non-polarized) terminal electrode L2 of the 0603 multilayer varistor; the part is symmetric, so terminals are interchangeable, and it has 80 V nominal varistor voltage at 1 mA, 10 V max allowable DC and 1 pF max capacitance at 1 MHz. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PANASONIC |
| Package | 0603 |
| Category | Circuit Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum allowable voltage DC | 10 | V | Maximum DC voltage applied continuously within operating temperature range (0603, EZJZ1V80010) | 2 | |||
| Capacitance | 0.8 | 1 | pF | at 1MHz | 2 | ||
| Operating temperature range | -40 | 85 | °C | Series-level statement printed under the 0402/0603 table | 2 | ||
| Change in varistor voltage after resistance to soldering heat | ΔVc/Vc | -10 | 10 | % | Soldering 270 °C 3 s / 260 °C 10 s, then 24±2 h recovery; general test spec for series | 8 | |
| Change in varistor voltage after temperature cycling | ΔVc/Vc | -10 | 10 | % | 5 cycles between max and min operating temperature, then 24±2 h recovery; general test spec for series | 8 | |
| Change in varistor voltage after biased humidity | ΔVc/Vc | -10 | 10 | % | 40±2 °C, 90 to 95 %RH, maximum allowable voltage, 500+24/0 h, then 24±2 h recovery | 8 | |
| Change in varistor voltage after high temperature exposure | ΔVc/Vc | -10 | 10 | % | Maximum operating temperature ±3 °C, maximum allowable voltage, 500+24/0 h, then 24±2 h recovery | 8 | |
| Nominal varistor voltage | 80 | V | at 1mA | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | PC, PDA USB2.0, IEEE1394, LAN1000BASE | 2 |
CAD (KiCad official)
- Symbol:
EZJZ1V80010 - Footprint:
Resistor_SMD:R_0603_1608Metric - 3D model: 0603 (KiCad packages3D, STEP)
- 3D model files:
ezjz1v80010-etched.step/ezjz1v80010-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ezjz1v80010.step/ezjz1v80010.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PANASONIC datasheet (8 pp, sha256
f3362cd2a624a3a1, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).