# EZJS2YD472

**PANASONIC** · Varistors · 0805

EZJS2YD472 from PANASONIC, in a 0805. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Terminal electrode L1 of the bipolar (non-polarized) varistor, rated for a maximum allowable DC voltage of 30 V. |
| 2 | 2 | passive | Terminal electrode L2 of the bipolar (non-polarized) varistor, interchangeable with the other terminal, with nominal varistor voltage of 50 V at 0.1 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | PANASONIC |
| Package | 0805 |
| Category | Circuit Protection |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum allowable voltage (DC) |  |  |  | 30 | V | DC, applied continuously | 2 |
| Maximum ESD (IEC61000-4-2) |  |  |  | 30 | kV | Contact discharge, IEC61000-4-2 | 2 |
| Operating temperature range |  | -40 |  | 85 | °C |  | 2 |
| Resistance to soldering heat: change in varistor voltage ΔVc/Vc | ΔVc/Vc | -10 |  | 10 | % | After immersion, 270 °C 3 s / 260 °C 10 s, then 24 h at standard condition | 5 |
| Temperature cycling: change in varistor voltage ΔVc/Vc | ΔVc/Vc | -10 |  | 10 | % | 5 cycles between max. and min. operating temperature, 30 ±3 min each step | 5 |
| Biased humidity: change in varistor voltage ΔVc/Vc | ΔVc/Vc | -10 |  | 10 | % | 40 ±2 °C, 90 to 95 %RH, maximum allowable voltage, 500 +24/0 h | 5 |
| High temperature exposure (dry heat): change in varistor voltage ΔVc/Vc | ΔVc/Vc | -10 |  | 10 | % | Maximum operating temperature ±3 °C, maximum allowable voltage, 500 +24/0 h | 5 |
| Capacitance |  |  | 4700 |  | pF | at 1 kHz | 2 |
| Nominal varistor voltage |  |  | 50 |  | V | at 0.1 mA | 2 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs |  | (5) Insufficient curing may cause the Varistors to fall off after or during soldering. In addition, insulation resistance between terminal electrodes may deteriorate due to moisture absorption. In ord | 10 |

## CAD (KiCad official)

- Symbol: `EZJS2YD472`
- Footprint: `Resistor_SMD:R_0805_2012Metric`
- 3D model: 0805 (KiCad packages3D, STEP)
- 3D model files: `ezjs2yd472-etched.step` / `ezjs2yd472-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ezjs2yd472.step` / `ezjs2yd472.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [PANASONIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588949784246173696) (15 pp, sha256 `a5cd9e0fd2c25f11`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ezjs2yd472-datasheet.pdf)