EX9610PD

{
  "schema_version": 1,
  "type": "component",
  "slug": "ex9610pd",
  "title": "EX9610PD",
  "brief": "Existar Synchronous Rectifier Controllers, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "ex9610pd"
  ],
  "component": {
    "mpn": "EX9610PD",
    "manufacturer": "Existar",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Synchronous Rectifier Controllers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603515453272563712",
    "parts": {
      "symbol": "ex9610pd.kicad_sym",
      "footprint": "ex9610pd.kicad_mod",
      "model_3d": "ex9610pd-etched.glb",
      "model_3d_plain": "ex9610pd.glb",
      "model_3d_step": "ex9610pd-etched.step",
      "model_3d_step_plain": "ex9610pd.step",
      "lbr": "ex9610pd.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. Floating pin, no electrical function. Leave open on the PCB."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "Chip supply pin. Fed from the internal 150V JFET self-supply through an LDO regulated to 7.7V typ (7.5-7.9V, with CVDD=1uF, HV=40V). Startup threshold 7.4V, UVLO 5.3V, clamp 8.3V. Requires a 1uF ceramic cap to S (GND) placed close to the pin."
      },
      {
        "number": "3",
        "name": "S",
        "type": "power_in",
        "description": "Source of the internal power MOSFET and ground reference for the control die. Pins 3 and 4 are internally tied - both must be connected to the low-side (output-side) net with a low-impedance path."
      },
      {
        "number": "4",
        "name": "S",
        "type": "power_in",
        "description": "Source of the internal power MOSFET and ground reference for the control die. Internally tied to pin 3."
      },
      {
        "number": "5",
        "name": "D",
        "type": "power_in",
        "description": "Drain of the internal 100V / 15mΩ SGT MOSFET and high-voltage sense / self-supply input. Pins 5, 6, 7, 8 are internally tied - parallel them and route close to the transformer secondary to minimise conduction and switching-node loss. Absolute max −0.3 to 100V; recommended operating <100V."
      },
      {
        "number": "6",
        "name": "D",
        "type": "power_in",
        "description": "Drain of the internal power MOSFET / HV sense. Internally tied to pins 5, 7, 8."
      },
      {
        "number": "7",
        "name": "D",
        "type": "power_in",
        "description": "Drain of the internal power MOSFET / HV sense. Internally tied to pins 5, 6, 8."
      },
      {
        "number": "8",
        "name": "D",
        "type": "power_in",
        "description": "Drain of the internal power MOSFET / HV sense. Internally tied to pins 5, 6, 7."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603515453272563712",
        "pages": 8,
        "sha256": "9ea1cf2d8026533e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ex9610pd.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ex9610pd-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1605028e97f7a9d184cea652e6db3a91fd7d9c19667eaf7daba0d41d94727fc5",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Existar",
      "Package": "SOP-8",
      "Category": "Power Management (PMIC)",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "EX9610PD",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ex9610pd"
  ],
  "discovery_pitch": "EX9610PD (Existar) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ex9610pd.kicad_sym",
    "ex9610pd.kicad_mod",
    "ex9610pd.glb",
    "ex9610pd.step",
    "ex9610pd.lbr",
    "docs/hero.png",
    "docs/ex9610pd-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T20:29:13.953Z"
}