component
EUP3484ADIR1
Public Made by Adomby adom
Eutech Microelectronics DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 21d ago |
| viewers | 21d ago |
| eup3484adir1-etched.glb | 21d ago |
| eup3484adir1-etched.step | 21d ago |
| eup3484adir1-hero.glb | 21d ago |
| eup3484adir1-hero.overlay.json | 21d ago |
| eup3484adir1.glb | 21d ago |
| eup3484adir1.kicad_mod | 21d ago |
| eup3484adir1.kicad_sym | 21d ago |
| eup3484adir1.lbr | 21d ago |
| eup3484adir1.step | 21d ago |
| package.json | 21d ago |
| page.json | 21d ago |
| README.md | 21d ago |
EUP3484ADIR1
Eutech Microelectronics · DC-DC Converters · SOIC-8-EP
EUP3484ADIR1 from Eutech Microelectronics, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BS | power_in | High-side gate drive boost input that supplies the drive for the high-side N-Channel DMOS switch, with a 0.01µF or greater capacitor connected from SW to BS. |
| 2 | IN | power_in | Input supply pin that powers the IC and the step-down converter switches, to be driven from a 4.5V to 30V source and bypassed to GND with a suitably large capacitor. |
| 3 | SW | power_out | Power switching output that connects the output LC filter from SW to the output load. |
| 4 | GND | power_in | Ground pin that must be connected to the exposed thermal pad for proper operation, with the pad tied to the PCB ground plane using multiple vias. |
| 5 | FB | input | Output feedback input that senses and regulates the output through a resistive divider, with a feedback threshold of 0.925V. |
| 6 | COMP | passive | Loop compensation pin where a series RC network is connected from COMP to GND to compensate the regulation loop. |
| 7 | EN | input | Enable logic input where driving high turns the regulator on and low turns it off; it must not be left floating and can be connected directly to IN for automatic startup. |
| 8 | SS | passive | Soft-start control input where an external capacitor programs the soft-start, and leaving it open selects the internal soft-start function. |
| 9 | GND | power_in | Exposed thermal pad that serves as GND and must be connected to the PCB ground plane using multiple vias for good thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Eutech Microelectronics |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VIN) | VIN | -0.3 | 35 | V | 4 | ||
| Enable Voltage (VEN) | VEN | -0.3 | 35 | V | 4 | ||
| Switch Voltages (VSW) | VSW | -1 | V | max printed as VIN +0.3V | 4 | ||
| Boot Voltage (VBS) | VBS | -0.3 | 6 | V | relative to VSW (VSW -0.3V to VSW +6V) | 4 | |
| All Other Pins | -0.3 | 6 | V | 4 | |||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature | 260 | °C | 4 | ||||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| Output Voltage | VOUT | 0.925 | 20 | V | 4 | ||
| Maximum Power Dissipation | PD | 2.083 | W | 4 | |||
| Input Voltage | VIN | 4.5 | 30 | V | 4 | ||
| Ambient Operating Temperature | TA | -40 | 85 | °C | 4 | ||
| Thermal Resistance θJA (SOP-8_EP) | θJA | 60 | °C/W | SOP-8 (EP) | 4 | ||
| Thermal Resistance θJC (SOP-8_EP) | θJC | 20 | °C/W | SOP-8 (EP) | 4 | ||
| Shutdown Supply Current | 1 | 5 | µA | VEN=0V | 4 | ||
| Supply Current | 0.45 | 0.9 | mA | VFB=1V | 4 | ||
| Feedback Voltage | VFB | 0.907 | 0.925 | 0.943 | V | 4.5 ≤ VIN ≤ 30V | 4 |
| Feedback Voltage (full operating temperature range) | VFB | 0.897 | 0.925 | 0.953 | V | 4.5 ≤ VIN ≤ 30V; ● full operating temperature range | 4 |
| EN Disable Threshold | 0.36 | 1.5 | 2 | V | ● full operating temperature range | 4 | |
| EN Lockout Threshold | 2.3 | 2.5 | 2.8 | V | VEN Rising | 4 | |
| EN Lockout Threshold (full operating temperature range) | 2 | 2.5 | 3 | V | VEN Rising; ● full operating temperature range | 4 | |
| Input Under Voltage Lockout Threshold | 3.8 | 4.1 | 4.4 | V | VIN Rising | 4 | |
| Upper Switch Current Limit (Minimum Duty Cycle) | 3.8 | 5.5 | A | Minimum Duty Cycle | 4 | ||
| Oscillation Frequency | fS | 300 | 340 | 380 | KHz | 4 |
CAD (KiCad official)
- Symbol:
EUP3484ADIR1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
eup3484adir1-etched.step/eup3484adir1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eup3484adir1.step/eup3484adir1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Eutech Microelectronics datasheet (11 pp, sha256
3331e0f6457b85f4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).