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EUP3453WIR1
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Eutech Microelectronics DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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EUP3453WIR1
Eutech Microelectronics · DC-DC Converters · SOIC-8-EP
EUP3453WIR1 from Eutech Microelectronics, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Bootstrap pin, connected to the SW node through a 10nF capacitor (CBST) in the typical application circuit. |
| 2 | VIN | power_in | Input supply pin, operating range 4.75V to 40V, decoupled with input capacitors (2x10µF in the typical circuit). |
| 3 | SW | output | Switching node of the internal 0.1Ω DMOS output switch, connected to the inductor and catch diode. |
| 4 | GND | power_in | Ground pin. |
| 5 | FB | input | Feedback input from the output resistor divider that sets the output voltage from 0.92V to 15V. |
| 6 | COMP | passive | Compensation pin, connected to an RC network (1.5nF and 10k in the typical circuit). |
| 7 | OCSET | input | Output current threshold programming pin, set by an external resistor to ground (200k in the typical circuit). |
| 8 | OVEN | input | Over voltage threshold programming input, set by an external resistor divider from the output. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Eutech Microelectronics |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
EUP3453WIR1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
eup3453wir1-etched.step/eup3453wir1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eup3453wir1.step/eup3453wir1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Eutech Microelectronics datasheet (1 pp, sha256
cd23076180bc3210, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EUP3453WIR1
**Eutech Microelectronics** · DC-DC Converters · SOIC-8-EP
EUP3453WIR1 from Eutech Microelectronics, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Bootstrap pin, connected to the SW node through a 10nF capacitor (CBST) in the typical application circuit. |
| 2 | VIN | power_in | Input supply pin, operating range 4.75V to 40V, decoupled with input capacitors (2x10µF in the typical circuit). |
| 3 | SW | output | Switching node of the internal 0.1Ω DMOS output switch, connected to the inductor and catch diode. |
| 4 | GND | power_in | Ground pin. |
| 5 | FB | input | Feedback input from the output resistor divider that sets the output voltage from 0.92V to 15V. |
| 6 | COMP | passive | Compensation pin, connected to an RC network (1.5nF and 10k in the typical circuit). |
| 7 | OCSET | input | Output current threshold programming pin, set by an external resistor to ground (200k in the typical circuit). |
| 8 | OVEN | input | Over voltage threshold programming input, set by an external resistor divider from the output. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Eutech Microelectronics |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `EUP3453WIR1`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `eup3453wir1-etched.step` / `eup3453wir1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eup3453wir1.step` / `eup3453wir1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Eutech Microelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884321276448768) (1 pp, sha256 `cd23076180bc3210`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eup3453wir1-datasheet.pdf)