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ETA6986F3W

Public Made by Adom

by adom

etasolution Battery Management, QFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ETA6986F3W

etasolution · Battery Management · QFN-20-EP(3x3)

ETA6986F3W from etasolution, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 STAT output Charging status pin that is pulled low while a charge is in progress and goes high-impedance when charging finishes.
2 VTERM input Multi-function pin: below 0.2V in charge mode sets charge termination at 4.2V, floating (internally set to 0.3V) sets 4.35V, and with VIN absent a high level enables boost mode (logic input high 1.2V, low 0.4V).
3 IN power_in Input OVP sense pin, to be bypassed with a 10uF capacitor to ground; IN absolute maximum voltage is 20V.
4 INSNS input Input sense pin internally clamped to 6.4V, with a resistor connected from INSNS to IN and a 1uF capacitor to analog ground.
5 CP passive Charge pump capacitor positive terminal.
6 CN passive Charge pump capacitor negative terminal.
7 INGT output Gate driver pin that controls the external NMOS power path; INGT absolute maximum voltage is 20V.
8 AGND power_in Analog ground pin.
9 OUT power_out USB 5V output during boost and charging input pin during charging, to be bypassed with 2x22uF MLCC caps placed as close as possible to the pin and PGND; OUT absolute maximum voltage is 6V.
10 SW passive Switching pin; connect an inductor between this pin and BATT.
11 PGND power_in Power ground pin.
12 PGND power_in Power ground pin.
13 PGND power_in Power ground pin.
14 BATS input Battery voltage sense pin, to be connected to the battery positive terminal with a separate sensing wire to avoid voltage drop for accurate battery CV charging.
15 IOLIM passive Sets the output current limit in boost mode; connect a resistor (Rlim) and a 470pF capacitor in parallel from this pin to analog ground.
16 SW passive Switching pin; connect an inductor between this pin and BATT.
17 OUT power_out USB 5V output during boost and charging input pin during charging, to be bypassed with 2x22uF MLCC caps placed as close as possible to the pin and PGND; OUT absolute maximum voltage is 6V.
18 NTC input Battery temperature monitoring input that sets the valid temperature operating range for both battery charging and discharging.
19 LDO1V power_out 1V LDO output that sets up the voltage reference for the NTC resistor network, to be bypassed with a 22pF capacitor to analog ground.
20 ISET passive Buck charging current setting pin; a resistor connected between this pin and analog ground sets the charge current level.
21 OUT power_out Listed in the datasheet pin table as OUT (same function as pins 9 and 17), though the package is a 20-lead QFN.

Key specifications

Parameter Value
Manufacturer etasolution
Package QFN-20-EP(3x3)
Category Power Management (PMIC)
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
IN Range 4.5 5.5 V 2
Battery CV Voltage (RVTERM=50K) 4.16 4.2 4.24 V RVTERM=50K, IBAT=0mA, default 2
Battery CV Voltage (RVTERM=open) 4.3 4.35 4.4 V RVTERM=open, IBAT=0mA, default 2
Output Voltage Range 5 5.05 5.1 V Boost mode 3
Switching Frequency 0.8 1 1.2 MHz VBATT<4.4V 3
Operating Temperature Range -40 85 ° C 2
Storage Temperature Range -55 150 ° C 2
OUT Voltage -0.3 6 V 2
IN, INGT Voltage -0.3 20 V 2
ESD HBM (Human Body Model) 2 KV 2
ESD MM (Machine Model) 200 V 2
NTC Input Leakage 0 5 μA 3
Thermal Resistance Junction-to-Case (θJC) θJC 2 oC/W QFN3x3-20 2
Thermal Resistance Junction-to-Ambient (θJA) θJA 30 oC/W QFN3x3-20 2
IN Standoff Voltage 20 V 2
IN UVLO Voltage 4.5 V Rising, Hys=500mV 2
PUMP Hiccup Threshold Voltage 300 mV Falling, Vin-Vout<300mV; Rising, Hys=50mV 2
PUMP Hiccup On Time 7 mS 2
PUMP Hiccup Off Time 200 mS 2
PUMP Frequency 500 KHZ 2
PUMP Voltage Vingt-Vout Vingt-Vout 3.5 V 2
INSNS Clamp Voltage 6.4 V 2
INSNS OVP Voltage 6 V Hys=300mV 2
IN Operating Current as BUCK (switching) 5 mA Switcher Enable, Switching 2
IN Operating Current as BUCK (not switching) 500 μA Switcher Enable, No Switching 2
Charger Restart Threshold From DONE to Fast Charge -150 mV 2
Battery Pre-Condition Voltage 3 V VBAT Rising, Hys=200mV 2
Pre-Condition Charge Current 200 mA 3
Fast Charge Current 3 A RISET=62KΩ 3
Charge Termination Current 200 mA RVICHRG=100K, CVICHRG=100pF 3
Charge Termination Blanking Time 12 S 3
BATT Ok Threshold 3.2 V Rising, HYS=0.5 V 3
Quiescent Current at BATT Boost On 100 μA 3
Shutdown Supply Current at BATT Idle Mode 30 μA 3
Iout Current Limit 3.5 A 3
Maximum Duty Cycle 90 % 3
Highside PMOS Rdson 45 mΩ ISW=500mA 3
Lowside NMOS Rdson 40 mΩ ISW=500mA 3
Short Circuit Hiccup Current 4 A 3
Short Circuit Hiccup On Time 25 ms 3
Short Circuit Hiccup Off Time 750 ms 3
Vhold Vout start to reduce charging current Vhold 4.65 V 3
ISET Voltage 0.8 V 3
NTC Threshold, Cold (Charger Suspended) 52 %ldo1V 3
NTC Threshold, Hot (Charger Suspended) 13 %ldo1V 3
NTC Threshold Hysteresis 2 %ldo1V 3
Logic Input High (VTERM for Boost Enabling) 1.2 V 3
Logic Input Low (VTERM for Boost Enabling) 0.4 V 3
Charging Thermal Regulation Threshold 85 oC 3
Thermal Shutdown 160 oC Rising, Hys=30oC 3

CAD (KiCad official)

  • Symbol: ETA6986F3W
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: eta6986f3w-etched.step / eta6986f3w-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eta6986f3w.step / eta6986f3w.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: etasolution datasheet (7 pp, sha256 5773051aebdbb45a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF