component
ETA5071V330DS2F
Public Made by Adomby adom
ETA(钰泰) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ETA5071V330DS2F
ETA(钰泰) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
ETA5071V330DS2F from ETA(钰泰), in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; input voltage range is 1.8V to 6.5V, and minimum VIN is 1.8V or VOUT + VDROPOUT, whichever is greater. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin: drive high to enable the IC and drive low to disable it; EN can be connected to VIN if not used (logic low max 0.4V, logic high min 1.2V for 1.8V ≤ VIN ≤ 5.5V). |
| 4 | NC | unconnected | Not connected. |
| 5 | VOUT | power_out | Output of the regulator, delivering up to 300mA output current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ETA(钰泰) |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | 1.8 | 6.5 | V | 3 | |||
| Output Current Limit | 350 | 500 | mA | VOUT = 95% | 4 | ||
| Output Voltage Range | 1 | 3.6 | V | Available in 100mV steps | 4 | ||
| Vout Voltage accuracy | -2 | 2 | % | IOUT =30mA, VOUT>1.8V | 4 | ||
| Voltage on VIN, EN, VOUT | -0.3 | 7 | V | 3 | |||
| Operating Temperature Range | -40 | 85 | °C | 3 | |||
| Storage Temperature Range | -55 | 150 | °C | 3 | |||
| Ground Current | 1 | µA | VEN=VIN, No Load | 3 | |||
| Shutdown Current | 0.3 | µA | VEN = 0V, 1.8V ≤ VIN ≤ 5.5V | 3 | |||
| Output Foldback Current Limit | 120 | mA | VOUT = 0V | 4 | |||
| Line Regulation | 0.2 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 4 | |||
| Load Regulation | 20 | mV | 0µA ≤ IOUT ≤ 300 mA | 4 | |||
| Start-up time | 70 | µs | 4 | ||||
| EN pin input Logic Low | 0.4 | V | 1.8V ≤ VIN ≤ 5.5V | 4 | |||
| EN pin input Logic High | 1.2 | V | 1.8V ≤ VIN ≤ 5.5V | 4 | |||
| Input current at EN pin | 0 | µA | VEN=VIN | 4 | |||
| Pulldown Resistor | 60 | Ω | Output Discharge Version | 4 | |||
| Thermal Shutdown | 150 | °C | Rising, Hysteresis =10° C | 4 | |||
| Thermal resistance, junction-to-ambient (SOT23-5) | JA | 180 | °C/W | SOT23-5 | 3 |
CAD (KiCad official)
- Symbol:
ETA5071V330DS2F - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
eta5071v330ds2f-etched.step/eta5071v330ds2f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eta5071v330ds2f.step/eta5071v330ds2f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ETA(钰泰) datasheet (11 pp, sha256
b9d166548ffb80f2, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ETA5071V330DS2F
**ETA(钰泰)** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
ETA5071V330DS2F from ETA(钰泰), in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; input voltage range is 1.8V to 6.5V, and minimum VIN is 1.8V or VOUT + VDROPOUT, whichever is greater. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin: drive high to enable the IC and drive low to disable it; EN can be connected to VIN if not used (logic low max 0.4V, logic high min 1.2V for 1.8V ≤ VIN ≤ 5.5V). |
| 4 | NC | unconnected | Not connected. |
| 5 | VOUT | power_out | Output of the regulator, delivering up to 300mA output current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ETA(钰泰) |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | | 1.8 | | 6.5 | V | | 3 |
| Output Current Limit | | 350 | | 500 | mA | VOUT = 95% | 4 |
| Output Voltage Range | | 1 | | 3.6 | V | Available in 100mV steps | 4 |
| Vout Voltage accuracy | | -2 | | 2 | % | IOUT =30mA, VOUT>1.8V | 4 |
| Voltage on VIN, EN, VOUT | | -0.3 | | 7 | V | | 3 |
| Operating Temperature Range | | -40 | | 85 | °C | | 3 |
| Storage Temperature Range | | -55 | | 150 | °C | | 3 |
| Ground Current | | | 1 | | µA | VEN=VIN, No Load | 3 |
| Shutdown Current | | | 0.3 | | µA | VEN = 0V, 1.8V ≤ VIN ≤ 5.5V | 3 |
| Output Foldback Current Limit | | | 120 | | mA | VOUT = 0V | 4 |
| Line Regulation | | | 0.2 | | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 4 |
| Load Regulation | | | 20 | | mV | 0µA ≤ IOUT ≤ 300 mA | 4 |
| Start-up time | | | 70 | | µs | | 4 |
| EN pin input Logic Low | | | 0.4 | | V | 1.8V ≤ VIN ≤ 5.5V | 4 |
| EN pin input Logic High | | | 1.2 | | V | 1.8V ≤ VIN ≤ 5.5V | 4 |
| Input current at EN pin | | | 0 | | µA | VEN=VIN | 4 |
| Pulldown Resistor | | | 60 | | Ω | Output Discharge Version | 4 |
| Thermal Shutdown | | | 150 | | °C | Rising, Hysteresis =10° C | 4 |
| Thermal resistance, junction-to-ambient (SOT23-5) | JA | | 180 | | °C/W | SOT23-5 | 3 |
## CAD (KiCad official)
- Symbol: `ETA5071V330DS2F`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `eta5071v330ds2f-etched.step` / `eta5071v330ds2f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eta5071v330ds2f.step` / `eta5071v330ds2f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ETA(钰泰) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603011689470717952) (11 pp, sha256 `b9d166548ffb80f2`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eta5071v330ds2f-datasheet.pdf)