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ETA5071V300DF1E

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ETA(钰泰） Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ETA5071V300DF1E

ETA(钰泰） · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)

ETA5071V300DF1E from ETA(钰泰）, in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output of the LDO, with an output current limit of 350 mA to 500 mA in normal operation and a foldback limit of 120 mA under hard short.
2 GND power_in Ground pin for the regulator; the datasheet gives no separate electrical limit for this pin.
3 EN input Enable pin: drive high to enable the IC and low to disable it, with logic low at most 0.4 V and logic high at least 1.2 V for 1.8 V ≤ VIN ≤ 5.5 V; it can be connected to VIN if not used.
4 VIN power_in Input supply pin with an input voltage range of 1.8 V to 6.5 V, and absolute maximum of -0.3 V to 7 V.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer ETA(钰泰）
Package DFN-4-EP(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range 1.8 6.5 V 3
Output Current Limit 350 500 mA VOUT = 95% 4
Vout voltage accuracy -2 2 % IOUT =30mA, VOUT>1.8V 4
Output Voltage Range 1 3.6 V Available in 100mV steps 4
Operating Temperature Range -40 85 °C 3
Storage Temperature Range -55 150 °C 3
Voltage at VIN, EN, VOUT VIN, EN, VOUT -0.3 7 V 3
Load Regulation 20 mV 0µA ≤ IOUT ≤ 300 mA 4
Line Regulation 0.2 %/V VOUT + 1V ≤ VIN ≤ 5.5V 4
Dropout Voltage 0.12 V IOUT =100mA, VOUT=2.8V 4
Output Foldback Current Limit 120 mA VOUT = 0V 4
Ground Current 1 µA VEN=VIN, No Load 3
Shutdown Current 0.3 µA VEN = 0V, 1.8V ≤ VIN ≤ 5.5V 3
Start-up time 70 µs 4
EN pin input Logic Low 0.4 V 1.8V ≤ VIN ≤ 5.5V 4
EN pin input Logic High 1.2 V 1.8V ≤ VIN ≤ 5.5V 4
Input current at EN pin 0 µA VEN=VIN 4
Pulldown Resistor 60 Ω Output Discharge Version 4
Thermal Shutdown 150 °C Rising, Hysteresis =10° C 4
Thermal Resistance, junction to ambient (DFN1x1-4) JA 120 °C/W 3
Thermal Resistance, junction to case (DFN1x1-4) JC 60 °C/W 3

CAD (KiCad official)

  • Symbol: ETA5071V300DF1E
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
  • 3D model files: eta5071v300df1e-etched.step / eta5071v300df1e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eta5071v300df1e.step / eta5071v300df1e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ETA(钰泰） datasheet (11 pp, sha256 b9d166548ffb80f2, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF