component
ETA5055V330DD1E
Public Made by Adomby adom
ETA(钰泰) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ETA5055V330DD1E
ETA(钰泰) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
ETA5055V330DD1E from ETA(钰泰), in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Output of the regulator; the ETA5055 delivers up to 500mA continuous output current (VOUT accuracy ±2% at IOUT=30mA, VOUT>1.8V). |
| 2 | GND | power_in | Ground pin for the LDO. |
| 3 | EN | input | Enable pin: drive high to enable the IC and drive low to disable it; with 1.8V≤VIN≤5.5V the logic low limit is 0.4V and the logic high threshold is 0.9V, and the absolute maximum on EN is -0.3V to 6V. |
| 4 | IN | power_in | Input supply pin; input voltage range is 1.8V to 5.5V, with an absolute maximum of -0.3V to 6V. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ETA(钰泰) |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | 1.8 | 5.5 | V | 3 | |||
| Output Voltage Accuracy | -2 | 2 | % | IOUT =30mA, VOUT>1.8V | 3 | ||
| Output Voltage Range | 1.1 | 3.6 | V | Available in 100mV steps | 3 | ||
| Output Current Limit | 540 | 800 | mA | VOUT = 95% | 3 | ||
| EN pin input Logic High | 0.9 | V | 1.8V ≤ VIN ≤ 5.5V | 3 | |||
| EN pin input Logic Low | 0.4 | V | 1.8V ≤ VIN ≤ 5.5V | 3 | |||
| Quiescent Current | 4.5 | µA | IOUT=0mA, VEN=VIN | 3 | |||
| Quiescent Current (Dropout) | 10 | µA | IOUT=0mA, Dropout | 3 | |||
| Shutdown Current | 1 | µA | VEN = 0V, 1.8V ≤ VIN ≤ 5.5V | 3 | |||
| Continuous Output Current | 500 | mA | 3 | ||||
| Output Foldback Current Limit | 400 | mA | VOUT = 0V | 3 | |||
| Line Regulation | 0.2 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 3 | |||
| Load Regulation | 15 | mV | 1mA ≤ IOUT ≤ 200 mA | 3 | |||
| Discharge Resistance | 90 | Ω | VIN=2.8V, VEN=0V | 3 | |||
| IN, EN, OUT Voltage | -0.3 | 6 | V | 2 | |||
| Operating Temperature Range | -40 | 85 | °C | 2 | |||
| Storage Temperature Range | -55 | 150 | °C | 2 | |||
| ESD HBM (Human Body Model) | 4 | kV | 2 | ||||
| ESD CDM (Charged Device Model) | 1 | kV | 2 | ||||
| Thermal Resistance Junction-to-Ambient (DFN1x1-4) | θJA | 120 | °C/W | DFN1x1-4 package | 2 |
CAD (KiCad official)
- Symbol:
ETA5055V330DD1E - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
eta5055v330dd1e-etched.step/eta5055v330dd1e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eta5055v330dd1e.step/eta5055v330dd1e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ETA(钰泰) datasheet (17 pp, sha256
c144d45dc3f68538, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ETA5055V330DD1E
**ETA(钰泰)** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
ETA5055V330DD1E from ETA(钰泰), in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Output of the regulator; the ETA5055 delivers up to 500mA continuous output current (VOUT accuracy ±2% at IOUT=30mA, VOUT>1.8V). |
| 2 | GND | power_in | Ground pin for the LDO. |
| 3 | EN | input | Enable pin: drive high to enable the IC and drive low to disable it; with 1.8V≤VIN≤5.5V the logic low limit is 0.4V and the logic high threshold is 0.9V, and the absolute maximum on EN is -0.3V to 6V. |
| 4 | IN | power_in | Input supply pin; input voltage range is 1.8V to 5.5V, with an absolute maximum of -0.3V to 6V. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ETA(钰泰) |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | | 1.8 | | 5.5 | V | | 3 |
| Output Voltage Accuracy | | -2 | | 2 | % | IOUT =30mA, VOUT>1.8V | 3 |
| Output Voltage Range | | 1.1 | | 3.6 | V | Available in 100mV steps | 3 |
| Output Current Limit | | 540 | | 800 | mA | VOUT = 95% | 3 |
| EN pin input Logic High | | 0.9 | | | V | 1.8V ≤ VIN ≤ 5.5V | 3 |
| EN pin input Logic Low | | | | 0.4 | V | 1.8V ≤ VIN ≤ 5.5V | 3 |
| Quiescent Current | | | | 4.5 | µA | IOUT=0mA, VEN=VIN | 3 |
| Quiescent Current (Dropout) | | | | 10 | µA | IOUT=0mA, Dropout | 3 |
| Shutdown Current | | | | 1 | µA | VEN = 0V, 1.8V ≤ VIN ≤ 5.5V | 3 |
| Continuous Output Current | | | | 500 | mA | | 3 |
| Output Foldback Current Limit | | | | 400 | mA | VOUT = 0V | 3 |
| Line Regulation | | | | 0.2 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 3 |
| Load Regulation | | | | 15 | mV | 1mA ≤ IOUT ≤ 200 mA | 3 |
| Discharge Resistance | | | | 90 | Ω | VIN=2.8V, VEN=0V | 3 |
| IN, EN, OUT Voltage | | -0.3 | | 6 | V | | 2 |
| Operating Temperature Range | | -40 | | 85 | °C | | 2 |
| Storage Temperature Range | | -55 | | 150 | °C | | 2 |
| ESD HBM (Human Body Model) | | | | 4 | kV | | 2 |
| ESD CDM (Charged Device Model) | | | | 1 | kV | | 2 |
| Thermal Resistance Junction-to-Ambient (DFN1x1-4) | θJA | | 120 | | °C/W | DFN1x1-4 package | 2 |
## CAD (KiCad official)
- Symbol: `ETA5055V330DD1E`
- Footprint: `Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm`
- 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files: `eta5055v330dd1e-etched.step` / `eta5055v330dd1e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eta5055v330dd1e.step` / `eta5055v330dd1e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ETA(钰泰) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010161988411392) (17 pp, sha256 `c144d45dc3f68538`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eta5055v330dd1e-datasheet.pdf)