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ETA5055V250DS2F

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ETA(钰泰) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ETA5055V250DS2F

ETA(钰泰) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

ETA5055V250DS2F from ETA(钰泰), in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin; the input voltage range is 1.8V to 5.5V, and the minimum VIN is 1.8V or VOUT + VDROPOUT, whichever is greater.
2 GND power_in Ground pin.
3 EN input Enable pin: drive high to enable the IC and low to disable it, with logic low specified at 0.4V and logic high at 0.9V for 1.8V ≤ VIN ≤ 5.5V.
4 NC unconnected Listed as NA for the SOT23-5 package in the pin table (it is NC on DFN2x2-6 pins 2 and 5), so no function is assigned on this package.
5 OUT power_out Regulator output pin; continuous output current is 500 mA, with output current limit of 540 mA to 800 mA and foldback limit of 400 mA under hard short.

Key specifications

Parameter Value
Manufacturer ETA(钰泰)
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 1.8 5.5 V 3
Output Voltage Accuracy -2 2 % IOUT =30mA, VOUT>1.8V 3
Quiescent Current IQ 4.5 µA IOUT=0mA, VEN=VIN 3
Quiescent Current (dropout) IQ 10 µA IOUT=0mA, Dropout 3
Shutdown Current 1 µA VEN = 0V, 1.8V ≤ VIN ≤ 5.5V 3
EN pin input Logic Low VIL 0.4 V 1.8V ≤ VIN ≤ 5.5V 3
EN pin input Logic High VIH 0.9 V 1.8V ≤ VIN ≤ 5.5V 3
Line Regulation 0.2 %/V VOUT + 1V ≤ VIN ≤ 5.5V 3
Load Regulation 15 mV 1mA ≤ IOUT ≤ 200 mA 3
Continuous Output Current IOUT 500 mA 3
Output Current Limit ILIM 540 800 mA VOUT = 95% 3
Output Foldback Current Limit 400 mA VOUT = 0V 3
Power Supply Rejection Ratio (100Hz) PSRR 96 dB Freq = 100Hz, IOUT = 20mA 3
Power Supply Rejection Ratio (1kHz) PSRR 94 dB Freq = 1KHz, IOUT = 20mA 3
Start-up Time 100 µs 3
Discharge Resistance 90 Ω VIN=2.8V, VEN=0V 3
Thermal Shutdown (rising, IOUT>1mA) 140 °C Rising, IOUT>1mA, Hysteresis =40° C 3
Thermal Shutdown (rising, IOUT=0mA) 135 °C Rising, IOUT=0mA, Hysteresis =40° C 3
Operating Temperature Range TA -40 85 °C 2
IN, EN, OUT Voltage -0.3 6 V 2
Storage Temperature Range TSTG -55 150 °C 2
ESD HBM (Human Body Model) 4 KV 2
ESD CDM (Charged Device Model) 1 KV 2
Thermal Resistance SOT23-5 (junction-to-case) JC 90 °C/W SOT23-5 2

CAD (KiCad official)

  • Symbol: ETA5055V250DS2F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: eta5055v250ds2f-etched.step / eta5055v250ds2f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eta5055v250ds2f.step / eta5055v250ds2f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ETA(钰泰) datasheet (17 pp, sha256 c144d45dc3f68538, retrieved 2026-11-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF