component
ETA5052V0S2G
Public Made by Adomby adom
etasolution Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownETA5052V0S2G
etasolution · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-6
ETA5052V0S2G from etasolution, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; the input voltage range is 2.7 V to 5.5 V, and VIN is rated to a 6 V absolute maximum. |
| 2 | GND | power_in | Ground pin for the regulator. |
| 3 | EN | input | Enable pin: drive high to enable the IC and low to disable it, with logic-low at 0.5 V max and logic-high at 1.2 V min for 2.7 V ≤ VIN ≤ 5.5 V; it can be connected to VIN if not used. |
| 4 | REFBP | passive | Reference voltage bypass pin; bypass it to GND with an external capacitor to improve high-frequency PSRR, and it is rated to 6 V absolute maximum. |
| 5 | FB | input | Feedback pin for setting the output voltage through an external resistor divider, with a feedback voltage of 1.178 V to 1.222 V and a 1 µA pin current at VFB = 1.8 V. |
| 6 | VOUT | power_out | Output of the regulator, rated for 300 mA continuous output current with an internal current limit of 350 mA to 600 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | etasolution |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | 2.7 | 5.5 | V | 2 | |||
| FB Feedback Voltage | 1.178 | 1.2 | 1.222 | V | 2 | ||
| REFBP Voltage | 1.188 | 1.2 | 1.212 | V | 2 | ||
| Output Current Limit | 350 | 600 | mA | VOUT = 95% | 2 | ||
| EN pin input Logic Low | 0.5 | V | 2.7V ≤ VIN ≤ 5.5V | 2 | |||
| EN pin input Logic High | 1.2 | V | 2.7V ≤ VIN ≤ 5.5V | 2 | |||
| Under Input Voltage Lock Out | 2.6 | V | Rising, Hysteresis=100mV | 2 | |||
| Ground Current | 170 | µA | 0µA ≤ IOUT ≤ 200mA | 2 | |||
| Shutdown Current | 1 | µA | VEN = 0V, 2.7V ≤ VIN ≤ 5.5V | 2 | |||
| Dropout Voltage | 135 | mV | IOUT = 200mA | 2 | |||
| Continuous Output Current | 300 | mA | 2 | ||||
| Output Foldback Current Limit | 300 | mA | VOUT = 0V | 2 | |||
| Line Regulation | 0.12 | %/V | VOUT + 1V ≤ VIN ≤ 5.5V | 2 | |||
| Load Regulation | 0 | mV | 0µA ≤ IOUT ≤ 200mA | 2 | |||
| FB Pin Current | 1 | µA | VFB = 1.8V | 2 | |||
| Power Supply Rejection Ratio at 100Hz | PSRR | 80 | dB | Freq = 100Hz, IOUT = 10mA | 2 | ||
| Power Supply Rejection Ratio at 1kHz | PSRR | 80 | dB | Freq = 1KHz, IOUT = 100mA | 2 | ||
| Power Supply Rejection Ratio at 10kHz | PSRR | 70 | dB | Freq = 10kHz, IOUT = 100mA | 2 | ||
| Power Supply Rejection Ratio at 100kHz | PSRR | 60 | dB | Freq = 100kHz, IOUT = 100mA | 2 | ||
| Output Noise Voltage | 30 | µVRMS | 2 | ||||
| Start-up time | 95 | µs | Floating REFBP, Iout=0 | 2 | |||
| Start-up time | 105 | µs | CREFBP = 4.7nF, Iout=0 | 2 | |||
| Start-up time | 110 | µs | CREFBP = 10nF, Iout=0 | 2 | |||
| Start-up time | 128 | µs | CREFBP = 33nF, Iout=0 | 2 | |||
| Thermal Shutdown | 150 | °C | Rising, Hysteresis =30°C | 2 | |||
| VIN, EN, VOUT, FB, REFBP Voltage | -0.3 | 6 | V | 2 | |||
| Operating Temperature Range | -40 | 85 | °C | 2 | |||
| Storage Temperature Range | -55 | 150 | °C | 2 | |||
| ESD HBM | 2 | KV | Human Body Model | 2 | |||
| ESD CDM | 1 | KV | Charged Device Mode | 2 |
CAD (KiCad official)
- Symbol:
ETA5052V0S2G - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
eta5052v0s2g-etched.step/eta5052v0s2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eta5052v0s2g.step/eta5052v0s2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: etasolution datasheet (6 pp, sha256
7d05d5391719d271, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).