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ETA5041V330DS2F

etasolution · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

ETA5041V330DS2F from etasolution, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Supply voltage pin with a 3 V to 45 V operating input range (absolute maximum IN to GND is 48 V); bypass with a 1 µF ceramic capacitor to GND.
2 GND power_in Ground reference pin for the regulator.
3 EN input Enable pin: drive high to enable and low to disable the IC; it defaults high when floating, with a logic high threshold of 1.2 V (rising) and a logic low threshold of 0.4 V (falling).
4 FB/NC unconnected Not connected on the fixed-voltage version, so this 3.3 V part leaves the pin unconnected; the FB feedback input for output voltage setting applies only to the adjustable version.
5 OUT power_out Regulated output voltage pin (300 mA output current capability); bypass with a 1 µF ceramic capacitor to GND.

Key specifications

Parameter Value
Manufacturer etasolution
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 3 45 V 2
Output Current Limit 300 400 mA VOUT=95% 2
Output Voltage Accuracy -2 2 % IOUT=30mA 2
IN, EN to GND Voltage -0.3 48 V 2
OUT to GND Voltage -0.3 40 V 2
Junction Temperature (absolute maximum) 150 ° C 2
Storage Temperature Range -55 150 C 2
Ambient Temperature Range -40 85 ° C 2
Junction Temperature Range -40 125 ° C 2
Ground Current 2.5 uA No Load 2
Shutdown Current 1 uA VEN=0V 2
Dropout Voltage 540 mV IOUT=100mA,VOUT=3.3V 2
Output Foldback Current Limit 200 mA VOUT=0V 2
Line Regulation 0.12 %/V VOUT+1V≤VIN≤45V 2
Load Regulation 20 mV 1mA≤IOUT≤100mA 2
Power Supply Rejection Ratio at 100Hz PSRR 88 dB Freq = 100Hz, IOUT = 10mA 2
Power Supply Rejection Ratio at 1KHz PSRR 70 dB Freq = 1KHz, IOUT = 10mA 2
EN Logic High Threshold 1.2 V Rising 2
EN Logic Low Threshold 0.4 V Falling 2
Discharge Resistance 60 Ω VEN=0 2
EN Input Current 0 uA VEN=3V 2
Thermal Shutdown 160 ° C Hysteresis=30° C 2

CAD (KiCad official)

  • Symbol: ETA5041V330DS2F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: eta5041v330ds2f-etched.step / eta5041v330ds2f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eta5041v330ds2f.step / eta5041v330ds2f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: etasolution datasheet (10 pp, sha256 0f4d65c74994dc05, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF