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docs eta3458fsg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
eta3458fsg-etched.fit.json eta3458fsg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
eta3458fsg-etched.glb eta3458fsg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
eta3458fsg-etched.step eta3458fsg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
eta3458fsg.glb Publish 0.1.0 · Ray
eta3458fsg.kicad_mod Publish 0.1.0 · Ray
eta3458fsg.kicad_sym Publish 0.1.0 · Ray
eta3458fsg.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
eta3458fsg.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json eta3458fsg: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md eta3458fsg: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

ETA3458FSG

etasolution · DC-DC Converters · SOT-563

ETA3458FSG from etasolution, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground return for the device. Connect to the system ground plane with low-impedance path close to the input capacitor.
2 SW output Switching node. Connect the external power inductor between SW and the regulator output. Internally driven by the high-side and low-side power MOSFETs (RDS(on) ~37mΩ HS / ~25mΩ LS).
3 VIN power_in Supply input, 2.5V to 5.5V. Bypass with a 22µF ceramic capacitor to GND placed close to the pin. Absolute maximum 7V.
4 EN input Enable input. Drive high (rising threshold typ 1.2V, falling 0.4V) to enable the converter; drive low to shut down (IQ <1µA). For automatic start-up, tie EN to VIN through a pull-up resistor. Absolute maximum 7V.
5 FB input Feedback input to the internal error comparator. Connect an external resistor divider from VOUT to FB and GND to set the output voltage: VOUT = 0.6V × (1 + R1/R2). Internal reference 0.6V (±1%); R2 should be 1kΩ-70kΩ.
6 OUT input Output sense/feed-forward pin. Connect to VOUT (the regulated output rail) or leave not connected. Used internally by the Adaptive COT control loop.

Key specifications

Parameter Value
Manufacturer etasolution
Package SOT-563
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • ETA3458FSG

CAD (KiCad official)

  • Symbol: ETA3458FSG
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: eta3458fsg-etched.step / eta3458fsg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eta3458fsg.step / eta3458fsg.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
eta3458fsg.step 448 KB You want the bare part, or you mark your own boards.
eta3458fsg-etched.step 2.2 MB You want the part with ETA3458FSG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 464 faces against 54 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: etasolution datasheet (10 pp, sha256 842e4e68b2a492eb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF