# ETA1653FSG

**ETA(钰泰)** · DC-DC Converters · SOT-563

ETA1653FSG from ETA(钰泰), in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Supply voltage input with a 4.5V to 17V operating range (24V standoff with OVP), to be bypassed with a 10µF ceramic capacitor to GND. |
| 2 | SW | power_out | Inductor connection that switches between the input and ground; connect the inductor between SW and the regulator output, with absolute maximum voltage on SW of -0.3V to 25V. |
| 3 | GND | power_in | Ground reference for the device, to which the IN bypass capacitor and the FB divider are returned. |
| 4 | BST | passive | Bootstrap pin for the high-side gate drive; connect a 10nF capacitor from BST to SW, with absolute maximum BST voltage of SW+6V. |
| 5 | EN | input | Enable input that turns the regulator on when driven high (rising threshold 1.0V to 1.4V, typical 1.2V) and off when low or floating (falling threshold 0.9V to 1.3V). |
| 6 | FB | input | Feedback input; connect an external resistor divider from the output to FB and GND to set VOUT, with an internal reference of 0.794V to 0.818V (typical 0.806V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ETA(钰泰) |
| Package | SOT-563 |
| Category | Power Management (PMIC) |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| FB Voltage | VFB | 0.794 | 0.806 | 0.818 | V |  | 2 |
| EN Rising Threshold | VEN_R | 1 | 1.2 | 1.4 | V | Rising | 2 |
| EN Falling Threshold | VEN_F | 0.9 | 1.1 | 1.3 | V | Falling | 2 |
| Input Voltage Range | VIN | 4.5 |  | 17 | V |  | 2 |
| IN, SW, EN Voltage |  | -0.3 |  | 25 | V |  | 2 |
| BST Voltage |  | -0.3 |  |  | V | Maximum printed as SW+6V; no numeric max given | 2 |
| FB Voltage (absolute maximum) |  | -0.3 |  | 6 | V |  | 2 |
| Operating Temperature Range | TA | -40 |  | 85 | °C |  | 2 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 2 |
| Thermal Resistance junction-to-case, SOT563 | θJC |  | 50 |  | °C/W | SOT563 package | 2 |
| ESD HBM (Human Body Mode) |  |  |  | 2 | KV | Human Body Model | 2 |
| ESD CDM (Charged Device Mode) |  |  |  | 1 | KV | Charged Device Model | 2 |

## CAD (KiCad official)

- Symbol: `ETA1653FSG`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `eta1653fsg-etched.step` / `eta1653fsg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eta1653fsg.step` / `eta1653fsg.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ETA(钰泰) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604747591665917952) (7 pp, sha256 `18fddfe905bfb055`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/eta1653fsg-datasheet.pdf)