component
ETA1096E8A
Public Made by Adomby adom
etasolution DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ETA1096E8A
etasolution · DC-DC Converters · ESOP-8
ETA1096E8A from etasolution, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GP | power_in | Power ground pin, one of two GP pins that must each have an output capacitor placed next to them per the PCB guidelines. |
| 2 | EN | input | Enable pin: drive high (EN logic high 1.6 V min) to enable the IC, low (EN logic low 0.6 V max) or floating to disable it. |
| 3 | SW | passive | Switching node of the switching regulator; connect a 1 uH to 2.2 uH inductor between IN and SW. |
| 4 | IN | power_in | Input pin; bypass IN to GND with a 10 uF or greater ceramic capacitor. |
| 5 | FB | input | Feedback input; connect an external resistor divider from the output to FB and GND, with Vout = 0.6 x (Ru+Rd)/Rd. |
| 6 | ISET | passive | Programmable peak-current-limit control; connect Riset between ISET and AGND, with Ipeak=(180/Riset)*1000 (A), adjustable from 0.6 A to 5.0 A. |
| 7 | OUT | power_out | Output pin; bypass with a 22 uF or larger ceramic capacitor closely between this pin and ground. |
| 8 | GP | power_in | Power ground pin, the second GP pin, which should also have an output capacitor placed closest to it. |
| 9 | AGND | power_in | Analog ground pin, internally connected to the analog ground of the control circuitry; keep it separate from PGND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | etasolution |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| All Pins Voltage | -0.3 | 5.5 | V | 2 | |||
| Operating Temperature Range | -40 | 85 | °C | 2 | |||
| Storage Temperature Range | -55 | 150 | °C | 2 | |||
| ESD HBM (Human Body Model) | 2 | KV | 2 | ||||
| Quiescent Current | 50 | 80 | μA | EN=IN, No load, Not switching | 2 | ||
| Shutdown Supply Current at VIN | 0.5 | 5 | μA | VEN =GND | 2 | ||
| Feedback Voltage | 0.588 | 0.6 | 0.612 | V | VOUT =2.1 to 5V | 2 | |
| Switching Frequency | 0.7 | 1 | 1.3 | MHz | 2 | ||
| Inductor Peak Current Limit | 2.5 | 3.5 | 4.5 | A | RISET=51kΩ | 2 | |
| Thermal Resistance Junction-to-Case (ESOP8) | θJC | 10 | °C/W | 2 | |||
| Thermal Resistance Junction-to-Ambient (ESOP8) | θJA | 50 | °C/W | 2 | |||
| VIN UVLO Voltage | VUVLO | 1.8 | V | 2 | |||
| VIN UVLO hysteresis | 0.3 | V | 2 | ||||
| FB Leakage Current | 0 | nA | 2 | ||||
| Output Over Voltage Protection | 6 | V | Hysteresis=500mV | 2 | |||
| NMOS Switch On Resistance | 40 | mΩ | 2 | ||||
| PMOS Switch On Resistance | 55 | mΩ | 2 | ||||
| SW Leakage Current | 10 | μA | VOUT=5V,VSW=0 or 5V, VEN=GND | 2 | |||
| Start-up Current Limit | 2.5 | A | 2 | ||||
| Short Circuit Hiccup time ON | 3.75 | ms | 2 | ||||
| Short Circuit Hiccup time OFF | 75 | ms | 2 | ||||
| Inductor Peak Current Limit | 6 | A | RISET=30kΩ | 2 | |||
| EN Input Current | 1.5 | μA | VEN=3V | 2 | |||
| EN logic high voltage | 1.6 | V | 2 | ||||
| EN logic low voltage | 0.6 | V | 2 | ||||
| Thermal Shutdown | 150 | °C | Rising, Hysteresis=20° C | 2 |
CAD (KiCad official)
- Symbol:
ETA1096E8A - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
eta1096e8a-etched.step/eta1096e8a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eta1096e8a.step/eta1096e8a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: etasolution datasheet (9 pp, sha256
e41ce7b0cf752752, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ETA1096E8A
**etasolution** · DC-DC Converters · ESOP-8
ETA1096E8A from etasolution, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GP | power_in | Power ground pin, one of two GP pins that must each have an output capacitor placed next to them per the PCB guidelines. |
| 2 | EN | input | Enable pin: drive high (EN logic high 1.6 V min) to enable the IC, low (EN logic low 0.6 V max) or floating to disable it. |
| 3 | SW | passive | Switching node of the switching regulator; connect a 1 uH to 2.2 uH inductor between IN and SW. |
| 4 | IN | power_in | Input pin; bypass IN to GND with a 10 uF or greater ceramic capacitor. |
| 5 | FB | input | Feedback input; connect an external resistor divider from the output to FB and GND, with Vout = 0.6 x (Ru+Rd)/Rd. |
| 6 | ISET | passive | Programmable peak-current-limit control; connect Riset between ISET and AGND, with Ipeak=(180/Riset)*1000 (A), adjustable from 0.6 A to 5.0 A. |
| 7 | OUT | power_out | Output pin; bypass with a 22 uF or larger ceramic capacitor closely between this pin and ground. |
| 8 | GP | power_in | Power ground pin, the second GP pin, which should also have an output capacitor placed closest to it. |
| 9 | AGND | power_in | Analog ground pin, internally connected to the analog ground of the control circuitry; keep it separate from PGND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | etasolution |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| All Pins Voltage | | -0.3 | | 5.5 | V | | 2 |
| Operating Temperature Range | | -40 | | 85 | °C | | 2 |
| Storage Temperature Range | | -55 | | 150 | °C | | 2 |
| ESD HBM (Human Body Model) | | | | 2 | KV | | 2 |
| Quiescent Current | | | 50 | 80 | μA | EN=IN, No load, Not switching | 2 |
| Shutdown Supply Current at VIN | | | 0.5 | 5 | μA | VEN =GND | 2 |
| Feedback Voltage | | 0.588 | 0.6 | 0.612 | V | VOUT =2.1 to 5V | 2 |
| Switching Frequency | | 0.7 | 1 | 1.3 | MHz | | 2 |
| Inductor Peak Current Limit | | 2.5 | 3.5 | 4.5 | A | RISET=51kΩ | 2 |
| Thermal Resistance Junction-to-Case (ESOP8) | θJC | | 10 | | °C/W | | 2 |
| Thermal Resistance Junction-to-Ambient (ESOP8) | θJA | | 50 | | °C/W | | 2 |
| VIN UVLO Voltage | VUVLO | | 1.8 | | V | | 2 |
| VIN UVLO hysteresis | | | 0.3 | | V | | 2 |
| FB Leakage Current | | | 0 | | nA | | 2 |
| Output Over Voltage Protection | | | 6 | | V | Hysteresis=500mV | 2 |
| NMOS Switch On Resistance | | | 40 | | mΩ | | 2 |
| PMOS Switch On Resistance | | | 55 | | mΩ | | 2 |
| SW Leakage Current | | | 10 | | μA | VOUT=5V,VSW=0 or 5V, VEN=GND | 2 |
| Start-up Current Limit | | | 2.5 | | A | | 2 |
| Short Circuit Hiccup time ON | | | 3.75 | | ms | | 2 |
| Short Circuit Hiccup time OFF | | | 75 | | ms | | 2 |
| Inductor Peak Current Limit | | | 6 | | A | RISET=30kΩ | 2 |
| EN Input Current | | | 1.5 | | μA | VEN=3V | 2 |
| EN logic high voltage | | | 1.6 | | V | | 2 |
| EN logic low voltage | | | 0.6 | | V | | 2 |
| Thermal Shutdown | | | 150 | | °C | Rising, Hysteresis=20° C | 2 |
## CAD (KiCad official)
- Symbol: `ETA1096E8A`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `eta1096e8a-etched.step` / `eta1096e8a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eta1096e8a.step` / `eta1096e8a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [etasolution datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904482333347840) (9 pp, sha256 `e41ce7b0cf752752`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eta1096e8a-datasheet.pdf)