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ESP8285N08

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Espressif Systems RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ESP8285N08

Espressif Systems · RF Transceiver ICs · QFN-32-EP(5x5)

ESP8285N08 from Espressif Systems, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDA power_in Analog supply, 2.5 V to 3.6 V.
2 LNA bidirectional RF antenna interface with chip output impedance of 39+j6 Ω; a π-type matching network is recommended between the chip and the antenna.
3 VDD3P3 power_in PA (power amplifier) supply, 2.5 V to 3.6 V.
4 VDD3P3 power_in PA (power amplifier) supply, 2.5 V to 3.6 V.
5 VDD_RTC unconnected Labelled NC (1.1 V) in the pin table although its type is listed as power.
6 TOUT input Internal ADC input that can measure either VDD3P3 (pins 3 and 4) or the TOUT input voltage, not both at once; an external input is limited to 0 to 1.0 V and the hardware design note says the pin must be left floating.
7 CHIP_EN input Chip enable: high level enables normal operation, low level shuts the chip down with very low current.
8 XPD_DCDC bidirectional Deep-sleep wake-up pin, also GPIO16; per the GPIO section it supports only an internal pull-down.
9 MTMS bidirectional GPIO14, also HSPI_CLK.
10 MTDI bidirectional GPIO12, also HSPI_MISO.
11 VDDPST power_in Digital/IO supply, 2.7 V to 3.6 V.
12 MTCK bidirectional GPIO13, also HSPI_MOSI and UART0_CTS.
13 MTDO bidirectional GPIO15, also HSPI_CS and UART0_RTS; used with GPIO2 and GPIO0 to select the boot mode and SDIO mode.
14 GPIO2 bidirectional GPIO2, usable as UART1_TX when burning flash; used with GPIO0 and MTDO to select the boot mode and SDIO mode.
15 GPIO0 bidirectional GPIO0, also SPI_CS2; used with GPIO2 and MTDO to select the boot mode and SDIO mode.
16 GPIO4 bidirectional GPIO4.
17 VDDPST power_in Digital/IO supply, 2.7 V to 3.6 V.
18 SDIO_DATA_2 bidirectional Connects to SD_D2 through a 200 Ω series resistor; also PIHD (printed; SPIHD in the SPI table), HSPIHD and GPIO9.
19 SDIO_DATA_3 bidirectional Connects to SD_D3 through a 200 Ω series resistor; also SPIWP, HSPIWP and GPIO10.
20 SDIO_CMD bidirectional Connects to SD_CMD through a 200 Ω series resistor; also SPI_CS0 and GPIO11; used for the embedded flash and not recommended for other functions.
21 SDIO_CLK bidirectional Connects to SD_CLK through a 200 Ω series resistor; also SPI_CLK and GPIO6; used for the embedded flash and not recommended for other functions.
22 SDIO_DATA_0 bidirectional Connects to SD_D0 through a 200 Ω series resistor; also SPI_MISO and GPIO7; used for the embedded flash and not recommended for other functions.
23 SDIO_DATA_1 bidirectional Connects to SD_D1 through a 200 Ω series resistor; also SPI_MOSI and GPIO8; used for the embedded flash and not recommended for other functions.
24 GPIO5 bidirectional GPIO5, also IR RX.
25 U0RXD bidirectional UART0 RX usable when burning flash, also GPIO3.
26 U0TXD bidirectional UART0 TX usable when burning flash, also GPIO1 and SPI_CS1; must not be pulled low externally during power-up.
27 XTAL_OUT bidirectional Crystal oscillator output; can also provide the clock input for BT.
28 XTAL_IN bidirectional Crystal oscillator input.
29 VDDD power_in Listed as analog supply, 2.5 V to 3.6 V.
30 VDDA power_in Analog supply, 2.5 V to 3.6 V.
31 RES12K input Connected to ground through a series 12 kΩ resistor.
32 EXT_RSTB input External reset signal, active low.
33 GND power_in Ground exposed pad, labelled GND in the pin layout figure; the datasheet gives no further electrical limit for it.

Key specifications

Parameter Value
Manufacturer Espressif Systems
Package QFN-32-EP(5x5)
Category RF And Wireless
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature (ESP8285N08, 1 MB flash) -40 85 °C ESP8285N08 variant (Table 1-1) 6
Operating voltage 2.7 3.3 3.6 V 24
Analog supply VDDA (pins 1, 30) VDDA 2.5 3.6 V Pin 1 and pin 30 9
RF PA supply VDD3P3 (pins 3, 4) VDD3P3 2.5 3.6 V Pin 3 and pin 4 10
Analog supply VDDD (pin 29) VDDD 2.5 3.6 V Pin 29 11
Digital/IO supply VDDPST (pins 11, 17) VDDPST 2.7 3.6 V Pin 11 and pin 17 10
Maximum soldering temperature 260 ℃ IPC/JEDEC J-STD-020 24
Low-level input voltage (lower limit) VIL -0.3 V 24
Low-level input voltage (upper limit) VIL 0.25 VIO 24
High-level input voltage (lower limit) VIH 0.75 VIO 24
High-level input voltage (upper limit) VIH 3.6 V 24
Low-level output voltage VOL 0.1 VIO 24
High-level output voltage VOH 0.8 VIO 24
Maximum I/O current IMAX 12 mA 24
ESD human body model (HBM) 2 KV TAMB = 25 ℃ 24
ESD charged device model (CDM) 0.5 KV TAMB = 25 ℃ 24
VDD33 rise time t1 10 2000 μs 25
EXT_RSTB rise time t2 0 2 ms 25
EXT_RSTB rises after VDD33 level is high t3 0.1 ms 25
CHIP_EN rise time t4 0 2 ms 25
CHIP_EN rises after EXT_RSTB level is high t5 0.1 ms 25
PA output power at 72.2 Mbps 13 14 15 dBm 72.2 Mbps 26
PA output power in 11b mode 18 19 20 dBm 11b mode 26
Wi-Fi input frequency 2412 2483.5 MHz 26
Crystal frequency FXO 24 52 MHz External crystal requirement (Table 3-1) 13
Crystal load capacitance CL 32 pF External crystal requirement (Table 3-1) 13
Crystal dynamic capacitance CM 2 5 pF External crystal requirement (Table 3-1) 13
Crystal series resistance RS 0 65 Ω External crystal requirement (Table 3-1) 13
Crystal frequency tolerance ΔFXO -15 15 ppm 13
Frequency tolerance over temperature ΔFXO,Temp -15 15 ppm -25 °C ~ 75 °C 14
External clock amplitude VXO 0.8 1.5 Vpp External clock reference (Table 3-2) 14
External clock accuracy ΔFXO,EXT -15 15 ppm External clock reference 14
External clock phase noise @1 kHz offset -120 dBc/Hz 40 MHz clock, 1 kHz offset 14
External clock phase noise @10 kHz offset -130 dBc/Hz 40 MHz clock, 10 kHz offset 14
External clock phase noise @100 kHz offset -138 dBc/Hz 40 MHz clock, 100 kHz offset 14
RES12K series resistor to ground R 12 kΩ Series resistor to ground on RES12K pin (31) 11
SDIO series resistor R 200 Ω In series with SD_D2, SD_D3, SD_CMD, SD_CLK, SD_D0, SD_D1 lines (pins 18-23) 10

CAD (KiCad official)

  • Symbol: ESP8285N08
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: esp8285n08-etched.step / esp8285n08-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); esp8285n08.step / esp8285n08.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Espressif Systems datasheet (31 pp, sha256 2574b569e1f10a30, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF