component
ESP8266EX
Public Made by Adomby adom
Espressif Systems RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownESP8266EX
Espressif Systems · RF Transceiver ICs · QFN-32-EP(5x5)
ESP8266EX from Espressif Systems, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDA | power_in | Analog supply pin, 2.5 V to 3.6 V. |
| 2 | LNA | bidirectional | RF antenna interface with chip output impedance of 39 + j6 Ω; a π-type matching network is recommended between the chip and the antenna. |
| 3 | VDD3P3 | power_in | Power amplifier supply, 2.5 V to 3.6 V. |
| 4 | VDD3P3 | power_in | Power amplifier supply, 2.5 V to 3.6 V. |
| 5 | VDD_RTC | unconnected | Listed as NC with a 1.1 V level in the pin table, so it is not for external connection. |
| 6 | TOUT | input | Internal ADC input that can measure VDD3P3 or the TOUT voltage (not both at once); when used with an external circuit the input range is 0 V to 1.0 V, and the hardware design requires this pin to be left floating. |
| 7 | CHIP_EN | input | Chip enable: high enables normal operation, low shuts the chip down with very low current. |
| 8 | XPD_DCDC | bidirectional | Deep-sleep wake-up pin, also GPIO16; only the internal pull-down can be enabled on this pad. |
| 9 | MTMS | bidirectional | GPIO14, also HSPI_CLK; can be configured with internal pull-up or pull-down and as a tri-state output. |
| 10 | MTDI | bidirectional | GPIO12, also HSPI_MISO. |
| 11 | VDDPST | power_in | Digital/IO supply, 1.8 V to 3.6 V. |
| 12 | MTCK | bidirectional | GPIO13, also HSPI_MOSI and UART0_CTS. |
| 13 | MTDO | bidirectional | GPIO15, also HSPI_CS and UART0_RTS; used with GPIO2 and GPIO0 for boot mode and SDIO mode selection. |
| 14 | GPIO2 | bidirectional | GPIO2, also UART1_TX usable when burning flash; used with GPIO0 and MTDO for boot mode and SDIO mode selection. |
| 15 | GPIO0 | bidirectional | GPIO0, also SPI_CS2; used with GPIO2 and MTDO for boot mode and SDIO mode selection. |
| 16 | GPIO4 | bidirectional | GPIO4, also PWM3. |
| 17 | VDDPST | power_in | Digital/IO supply, 1.8 V to 3.6 V. |
| 18 | SDIO_DATA_2 | bidirectional | Connected to SD_D2 through a 200 Ω series resistor; also HSPIHD and GPIO9. |
| 19 | SDIO_DATA_3 | bidirectional | Connected to SD_D3 through a 200 Ω series resistor; also SPIWP, HSPIWP and GPIO10. |
| 20 | SDIO_CMD | bidirectional | Connected to SD_CMD through a 200 Ω series resistor; also SPI_CS0 and GPIO11. |
| 21 | SDIO_CLK | bidirectional | Connected to SD_CLK through a 200 Ω series resistor; also SPI_CLK and GPIO6. |
| 22 | SDIO_DATA_0 | bidirectional | Connected to SD_D0 through a 200 Ω series resistor; also SPI_MISO and GPIO7. |
| 23 | SDIO_DATA_1 | bidirectional | Connected to SD_D1 through a 200 Ω series resistor; also SPI_MOSI and GPIO8. |
| 24 | GPIO5 | bidirectional | GPIO5, also IR RX. |
| 25 | U0RXD | bidirectional | UART0 RX usable when burning flash, also GPIO3. |
| 26 | U0TXD | bidirectional | UART0 TX usable when burning flash, also GPIO1 and SPI_CS1; should not be pulled low externally during power-up. |
| 27 | XTAL_OUT | bidirectional | Crystal oscillator output, which can also provide the clock input for BT. |
| 28 | XTAL_IN | bidirectional | Crystal oscillator input. |
| 29 | VDDD | power_in | Analog supply, 2.5 V to 3.6 V. |
| 30 | VDDA | power_in | Analog supply, 2.5 V to 3.6 V. |
| 31 | RES12K | input | Connect through a 12 kΩ series resistor to ground. |
| 32 | EXT_RSTB | input | External reset signal, active low. |
| 33 | GND | power_in | Ground (exposed pad), shown as pin 33 in the pin layout diagram; not listed in Table 2-1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Espressif Systems |
| Package | QFN-32-EP(5x5) |
| Category | RF And Wireless |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage | 2.5 | 3.3 | 3.6 | V | 25 | ||
| Operating temperature range | -40 | 125 | ℃ | 25 | |||
| Analog supply (VDDA, pins 1, 29, 30) | VDDA | 2.5 | 3.6 | V | 10 | ||
| PA supply (VDD3P3, pins 3, 4) | VDD3P3 | 2.5 | 3.6 | V | 10 | ||
| Analog supply (VDDD, pin 29) | VDDD | 2.5 | 3.6 | V | 12 | ||
| Digital/IO supply (VDDPST, pins 11, 17) | VDDPST | 1.8 | 3.6 | V | 11 | ||
| TOUT input voltage | TOUT | 0 | 1 | V | TOUT pin connected to external circuit | 24 | |
| Low-level input voltage (lower limit) | VIL | -0.3 | V | 25 | |||
| Low-level input voltage (upper limit) | VIL | 0.25 | VIO | 25 | |||
| High-level input voltage (lower limit) | VIH | 0.75 | VIO | 25 | |||
| High-level input voltage (upper limit) | VIH | 3.6 | V | 25 | |||
| Low-level output voltage | VOL | 0.1 | VIO | 25 | |||
| High-level output voltage | VOH | 0.8 | VIO | 25 | |||
| Maximum I/O current | IMAX | 12 | mA | 25 | |||
| ESD human body model (HBM) | 2 | KV | TAMB = 25 ℃ | 25 | |||
| ESD charged device model (CDM) | 0.5 | KV | TAMB = 25 ℃ | 25 | |||
| Maximum soldering temperature | 260 | ℃ | IPC/JEDEC J-STD-020 | 25 | |||
| VDD33 rise time | t1 | 10 | 2000 | μs | 26 | ||
| EXT_RSTB rise time | t2 | 0 | 2 | ms | 26 | ||
| EXT_RSTB rises after VDD33 high | t3 | 0.1 | ms | 26 | |||
| CHIP_EN rise time | t4 | 0 | 2 | ms | 26 | ||
| CHIP_EN rises after EXT_RSTB high | t5 | 0.1 | ms | 26 | |||
| PA output power | 15.5 | 16.5 | 17.5 | dBm | 72.2 Mbps | 26 | |
| Input frequency | 2412 | 2484 | MHz | 26 | |||
| PA output power (802.11b mode) | 19.5 | 20.5 | 21.5 | dBm | 11b mode | 27 | |
| Crystal frequency | FXO | 24 | 52 | MHz | 14 | ||
| Crystal load capacitance | CL | 32 | pF | 14 | |||
| Crystal motional capacitance | CM | 2 | 5 | pF | 14 | ||
| Crystal series resistance | RS | 0 | 65 | Ω | 14 | ||
| Crystal frequency tolerance | ΔFXO | -15 | 15 | ppm | 14 | ||
| Crystal frequency vs temperature | ΔFXO,Temp | -15 | 15 | ppm | -25 °C ~ 75 °C | 14 | |
| External clock amplitude | VXO | 0.8 | 1.5 | Vpp | 15 | ||
| External clock accuracy | ΔFXO,EXT | -15 | 15 | ppm | 15 | ||
| Clock phase noise | -120 | dBc/Hz | @1kHz 偏移, 40 MHz 时钟 | 15 | |||
| Clock phase noise | -130 | dBc/Hz | @10 kHz 偏移, 40 MHz 时钟 | 15 | |||
| Clock phase noise | -138 | dBc/Hz | @100 kHz 偏移, 40 MHz 时钟 | 15 |
CAD (KiCad official)
- Symbol:
ESP8266EX - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
esp8266ex-etched.step/esp8266ex-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esp8266ex.step/esp8266ex.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Espressif Systems datasheet (32 pp, sha256
4e8b483c552a4926, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).